W DOC AIRBUS | AMM A320F

DIGITAL FLIGHT DATA RECORDING SYSTEM (DFDRS) - INTERCONNECTION - DESCRIPTION AND OPERATION

** ON A/C NOT FOR ALL
1. General
The main function of the DFDRS is to convert various critical flight parameters into a recordable form and to record them on a Digital Flight Data Recorder. The stored data is also applicable to monitor the condition of the connected aircraft systems. The system design covers the basic DFDRS. This includes the units and the parameters that are necessary for the mandatory requirements and an additional part to standardize the installation for different customers. The electrical characteristic is in compliance with ARINC 717.
The Digital Flight-Data Recording-System (DFDRS) is a part of the Flight Data Interface and Management System (FDIMS). The FDIMS has:
The Flight Data Interface and Management Unit (FDIMU) controls the FDIMS.

The primary function of the DFDRS is to convert different critical flight parameters into a recordable form and to record them on Digital Flight Data Recorder (DFDR). The stored data is also applicable to monitor the condition of the connected aircraft systems. This includes the units and parameters which are necessary for the mandatory requirements and one more part to standardize the installation for different customers. The electrical characteristic is in compliance with ARINC 717.
The Flight Data Interface and Management Unit (FDIMU) controls these two systems:
  • The Digital Flight Data Recording System (DFDRS)
  • The Aircraft Integrated Data System (AIDS). Refer to (Ref. AMM D/O 31-36-00-00) for details.
The primary function of the DFDRS is to convert different critical flight parameters into a recordable form and to record them on a Digital Flight Data Recorder (DFDR).

The stored data is also applicable to monitor the condition of the connected aircraft systems.

This includes the units and parameters which are necessary for the mandatory requirements and one more part to standardize the installation for different customers. The electrical characteristic is in compliance with ARINC 717.
The Digital Flight-Data Recording-System (DFDRS) is a part of the Flight Data Interface and Management System (FDIMS). The FDIMS has:
The Flight Data Interface and Management Unit (FDIMU) controls the FDIMS.

The primary function of the DFDRS is to convert different critical flight parameters into a recordable form and to record them on 2 Cockpit Voice Data Recorders (CVDRs). The stored data is also applicable to monitor the condition of the connected aircraft systems. This includes the units and parameters which are necessary for the mandatory requirements and one more part to standardize the installation for different customers. The electrical characteristic is in compliance with ARINC 717.
** ON A/C NOT FOR ALL
2. Component Location
F Component Location
F Component Location
F Component Location ** ON A/C NOT FOR ALL
F Component Location ** ON A/C NOT FOR ALL
F Component Location ** ON A/C NOT FOR ALL
F Component Location ** ON A/C NOT FOR ALL
F Component Location ** ON A/C NOT FOR ALL
F Component Location ** ON A/C NOT FOR ALL

Installation Zones and Location Numbers
For Installation Zones and Location Numbers refer to (Ref. AMM D/O 31-39-00-00)
FIN FUNCTIONAL
DESIGNATION		 PANEL ZONE ACCESS
DOOR		 ATA REF
** ON A/C NOT FOR ALL
1TU DFDR 312AR 312 31-33-55
** ON A/C NOT FOR ALL
1TU DFDR 312 31-33-55
** ON A/C NOT FOR ALL
2TU FDIU 87VU 120 31-33-34
** ON A/C ALL
6TU ACCELEROMETER-THREE AXIS 145 31-33-16
** ON A/C NOT FOR ALL
10TV DMU/FDIU (FDIMU) 87VU 120 31-36-34
** ON A/C NOT FOR ALL
10TV DMU/FDIU (FDIMU) 87VU 120 31-36-34
** ON A/C NOT FOR ALL
3TU QAR 87VU 120 31-33-52
3TU1 MEMORY MEDIA (QAR) 87VU 120 31-33-00
3TUSW2 OPERATIONAL S/W (QAR) 87VU 120 31-33-00
** ON A/C NOT FOR ALL
10TVMD1 DISK - FDIMU S/W, FDIU PART (MEDIA) 87VU 120 31-36-00
** ON A/C NOT FOR ALL
10TVSW1 DISK - FDIMU S/W, FDIU PART 87VU 120 31-36-00
** ON A/C NOT FOR ALL
10TVMD1 DISK - FDIMU S/W, FDIU PART (MEDIA) 87VU 120 31-36-00
** ON A/C NOT FOR ALL
3. System Description
F System Block Diagram ** ON A/C NOT FOR ALL

The FDIU is connected to different aircraft systems. DATA (parameters) are received in discrete and digital form. The FDIU collects these parameters and converts them for internal processing. A standardized set of flight critical parameters are transmitted in serialized digital form to the DFDR. These parameters are stored on the recorder in data frame cycles. The FDIU generates aircraft data and sends them to the ARINC 429 output bus. A separate linear accelerometer is installed to provide the FDIU with acceleration data appearing in the center of gravity. The SDAC digitizes the analog signal of the LA and sends it to the FDIU via ARINC 429 bus. The EVENT Button and the Override Button of power interlock are located on the CTL PNL's.
F System Block Diagram ** ON A/C NOT FOR ALL
The FDIMU controls the FDIMS. The FDIMU puts together the functions of DFDRS and the AIDS into a single Line-Replaceable-Unit (LRU). These two functions are controlled inside the FDIMU by two separate processor-units (FDIU-part, DMU-part), which operate independently from each other. An internal data-bus does the data-transmission from the FDIU-part to the DMU-part.

  • The FDIMS is connected to different A/C-systems and receives data in discrete and digital format.
  • The FDIMS can transmit reports to the Aircraft Communication Addressing and Reporting System (ACARS) and to the printer in the cockpit.
  • Through the MCDUs in the cockpit, it is possible to control the FDIMS and to see system-reports.
  • The FDIMU has an integrated PCMCIA-Interface to upload application-software and to download AIDS-reports with a notebook-computer.
  • You can load the application-software of the FDIU- and DMU-part through a Portable Data Loader (PDL) or an optional Multipurpose Disk Drive Unit (MDDU). The MDDU is installed in the cockpit.
  • The FDIMU is supplied with 115VAC 400Hz single phase.

F System Block Diagram ** ON A/C NOT FOR ALL
F System Block Diagram ** ON A/C NOT FOR ALL
F System Block Diagram ** ON A/C NOT FOR ALL
The FDIMU controls the FDIMS. The FDIMU puts together the functions of DFDRS and AIDS into a single Line-Replaceable-Unit (LRU). These two functions are controlled inside the FDIMU by two separate processor-units (FDIU-part, DMU-part), which operate independently from each other. An internal data-bus does the data-transmission from the FDIU-part to the DMU-part.

  • The FDIMU is connected to different A/C-systems and receives data in discrete and digital format.
  • The FDIMU can transmit reports to the Aircraft Communication Addressing and Reporting System (ACARS) and to the printer in the cockpit.
  • Through the MCDUs in the cockpit, it is possible to control the FDIMU and to see system-reports.
  • The FDIMU has an integrated PCMCIA-Interface to upload application-software and to download AIDS-reports with a notebook-computer.
  • You can load the application-software of the FDIU-part and DMU-part through a Portable Data Loader (PDL).
  • The FDIMU is supplied with 115VAC 400Hz single phase.

A. DFDRS Function:
The FDIU-part collects all critical flight-parameters from various A/C-systems and sends it to the DFDR. The FDIU-part converts the flight parameters and sends them in serial digital format to the DFDR. These flight-parameters are stored to the DFDR and to the QAR (if installed) in data-frame cycles.
At the same time the FDIU-part sends an audio signal encoded in GMT-information to the Cockpit Voice Recorder (CVR).

The three-axis Linear Accelerometer (LA) is installed between Frame 42 and 45 under a floor panel of the passenger compartment (center of gravity of the A/C). The LA generates acceleration data in analog format. The analog information from the LA is sent to the System Data Acquisition Computer (SDAC). The SDAC converts this information to a digital format and sends it to the FDIU-part via an ARINC-429 data-bus. The FDIU-part sends this acceleration data to the DFDR together with the other flight-parameters. On each flight the FDIU-part makes an integrity check of the acceleration-parameters.

The status of the DFDR and the status of the FDIU-part (failure/no failure) is monitored by the SDACs. If a failure occurs, it is shown on the ECAM display.

For maintenance and test of the DFDRS, the FDIU-part is connected with the Centralized Fault Display Interface Unit (CFDIU) of the Centralized Fault Display System (CFDS).

The FDIU-part collects all critical flight-parameters from different A/C-systems and sends them to the CVDRs. The FDIU-part converts the flight parameters and sends them in serial digital format to the CVDRs. These flight-parameters are stored to the CVDRs and to the QAR (if installed) in data-frame cycles.

At the same time the FDIU-part sends an audio signal encoded in UTC-time to the Cockpit Voice Recorder-parts of the CVDRs (CVR-parts) through AMU.

The three-axis Linear Accelerometer (LA) is installed between Frame 42 and 45 under a floor panel of the passenger compartment (center of gravity of the A/C). The LA generates acceleration data in analog format. The analog information from the LA is sent to the System Data Acquisition Computer (SDAC). The SDAC converts this information to a digital format and sends it to the FDIU-part through an ARINC-429 data-bus. The FDIU-part sends this acceleration data to the CVDRs together with the other flight-parameters. On every flight the FDIU-part makes an integrity check of the acceleration-parameters.

The status of the CVDRs (failure/no failure) are monitored by the FWS and CFDS. If a failure of both CVDRs occurs, it is shown on the ECAM display. If a failure of only one CVDR occurs, no message is shown on the ECAM. The status of the FDIU-part (failure/no failure) is monitored by the SDACs. If a failure occurs, it is shown on the ECAM display.

For maintenance and test of the DFDRS, the FDIU-part and the CVDRs are connected with the Centralized Fault Display Interface Unit (CFDIU) of the Centralized Fault Display System (CFDS).

B. AIDS Function
(Ref. AMM D/O 31-36-00-00)
C. System Architecture
F System Block Diagram ** ON A/C NOT FOR ALL
F DFDRS Interconnection Schematic 1/2 ** ON A/C NOT FOR ALL
F DFDRS Interconnection Schematic 2/2 ** ON A/C NOT FOR ALL
The DFDRS has:
  • A Flight Data Interface Unit (FDIU)
  • A Digital Flight Data Recorder (DFDR)
  • A Linear Accelerometer (LA)
  • A Control Panel (CTL PNL)
  • An Event Marker Button (EVENT).
The minimum equipment of a basic DFDRS (FDIU, DFDR, LA, CTL PNL and EVENT) must be installed on each aircraft. This is to meet the requirement of the authorities for recording of mandatory parameters.
F System Block Diagram ** ON A/C NOT FOR ALL
F System Block Diagram ** ON A/C NOT FOR ALL
The DFDRS has:
  • A Flight Data Interface Management Unit (FDIMU) (FDIU-Part)
  • A Digital Flight Data Recorder (DFDR)
  • A Linear Accelerometer (LA)
  • A Control Panel (CTL PNL)
  • An Event Marker Button (EVENT).
The minimum equipment of a basic DFDRS (FDIMU, DFDR, LA, CTL PNL and EVENT) must be installed on each aircraft. This is to meet the requirement of the authorities for recording of mandatory parameters.
F System Block Diagram ** ON A/C NOT FOR ALL
F DFDRS Interconnection Schematic 1/2 ** ON A/C NOT FOR ALL
F DFDRS Interconnection Schematic 2/2 ** ON A/C NOT FOR ALL
The DFDRS has:
  • A Flight Data Interface Management Unit (FDIMU) (FDIU-PART)
  • A Digital Flight Data Recorder (DFDR)
  • A Wireless Ground Link - Quick Access Recorder (WGL-QAR)
  • A Linear Accelerometer (LA)
  • A Control Panel (CTL PNL)
  • An Event Marker Button (EVENT).
The minimum equipment of a basic DFDRS (FDIMU, DFDR, LA, CTL PNL and EVENT) must be installed on each aircraft. This condition obeys the requirement of the authorities to record the mandatory parameters.
F System Block Diagram ** ON A/C NOT FOR ALL
The DFDRS has:
  • A Flight Data Interface Management Unit (FDIMU) (FDIU-Part)
  • A Linear Accelerometer (LA)
  • A Control Panel (CTL PNL)
  • An Event Marker Button (EVENT).
The minimum equipment of a basic DFDRS (FDIMU, LA, CTL PNL and EVENT) must be installed on each aircraft. This is to meet the requirement of the authorities for recording of mandatory parameters.
** ON A/C NOT FOR ALL
4. System Power Supply
F Power Supply ** ON A/C NOT FOR ALL

The FDIU is supplied from the busbar via the circuit breaker 8TU. The power interlock controls the power supply of the DFDR. The LA is connected to the 28 V DC bus, via the circuit breaker 9TU. The supply of the power interlock relays is achieved via the circuit breaker 4RK. The maximum power consumption and the busbar connection is as listed below.
----------------------------------------------------------------------------
COMPONENT ! PWR.CONS. ! VOLTAGE ! BUSBAR ! C/B
----------------------------------------------------------------------------
DFDR ! 15 VA ! 115 V AC ! 202XP NORM ! 7TU
FDIU ! 25 VA ! 115 V AC ! 202XP NORM ! 8TU
LA ! 2 VA ! 28 V DC ! 204PP NORM ! 9TU
----------------------------------------------------------------------------

F Power Supply ** ON A/C NOT FOR ALL
  • The FDIMU is supplied from the AC-NORM busbar through the circuit breaker 5TV.
  • The DFDR is supplied from the AC-NORM busbar through the circuit breaker 7TU. The operation of the DFDR is controlled by the power-interlock.
  • The LA is supplied from the DC-NORM busbar through the circuit breaker 9TU.
  • The power-interlock relays are supplied from the DC-ESS busbar through the circuit breaker 4RK.

    The maximum power consumption and the busbar connection is as shown below:
    -------------------------------------------------------------------------------
    COMPONENT PWR.CONS. VOLTAGE BUSBAR C/B
    -------------------------------------------------------------------------------
    DFDR 10 VA 115 V AC 202XP NORM 7TU
    FDIMU 37 VA 115 V AC 202XP NORM 5TV
    LA 2 VA 28 V DC 204PP NORM 9TU
    -------------------------------------------------------------------------------

F Power Supply ** ON A/C NOT FOR ALL

The FDIU is supplied from the busbar via the circuit breaker 8TU. The power interlock controls the power supply of the DFDR and QAR. The LA is connected to the 28 V DC bus, via the circuit breaker 9TU. The supply of the power interlock relays is achieved via the circuit breaker 4RK. The maximum power consumption and the busbar connection is as listed below.
----------------------------------------------------------------------------
COMPONENT ! PWR.CONS. ! VOLTAGE ! BUSBAR ! C/B
----------------------------------------------------------------------------
DFDR ! 19 VA ! 115 V AC ! 202XP NORM ! 7TU
FDIU ! 23 VA ! 115 V AC ! 202XP NORM ! 8TU
LA ! 2 VA ! 28 V DC ! 204PP NORM ! 9TU
----------------------------------------------------------------------------

F Power Supply ** ON A/C NOT FOR ALL

The FDIU is supplied from the busbar via the circuit breaker 8TU. The power interlock controls the power supply of the DFDR and QAR. The LA is connected to the 28 V DC bus, via the circuit breaker 9TU. The supply of the power interlock relays is achieved via the circuit breaker 4RK. The maximum power consumption and the busbar connection is as listed below.
----------------------------------------------------------------------------
COMPONENT ! PWR.CONS. ! VOLTAGE ! BUSBAR ! C/B
----------------------------------------------------------------------------
DFDR ! 8 VA ! 115 V AC ! 202XP NORM ! 7TU
FDIU ! 23 VA ! 115 V AC ! 202XP NORM ! 8TU
LA ! 2 VA ! 28 V DC ! 204PP NORM ! 9TU
----------------------------------------------------------------------------

F Power Supply ** ON A/C NOT FOR ALL
  • The FDIMU is supplied from the AC-NORM busbar through the circuit breaker 5TV.
  • The DFDR is supplied from the AC-NORM busbar through the circuit breaker 7TU. The operation of the DFDR is controlled by the power-interlock.
  • The LA is supplied from the DC-NORM busbar through the circuit breaker 9TU.
  • The power-interlock relays are supplied from the DC-ESS busbar through the circuit breaker 4RK.

    The maximum power consumption and the busbar connection is as shown below:
    -------------------------------------------------------------------------------
    COMPONENT PWR.CONS. VOLTAGE BUSBAR C/B
    -------------------------------------------------------------------------------
    DFDR 10 VA 115 V AC 202XP NORM 7TU
    FDIMU 30 VA 115 V AC 202XP NORM 5TV
    LA 2 VA 28 V DC 204PP NORM 9TU
    -------------------------------------------------------------------------------

F Power Supply ** ON A/C NOT FOR ALL
F Power Supply ** ON A/C NOT FOR ALL
  • The FDIMU is supplied from the AC-NORM busbar through the circuit breaker 5TV.
  • The DFDR is supplied from the AC-NORM busbar through the circuit breaker 7TU. The operation of the DFDR is controlled by the power-interlock.
  • The LA is supplied from the DC-NORM busbar through the circuit breaker 9TU.
  • The power-interlock relays are supplied from the DC-ESS busbar through the circuit breaker 4RK.

    The maximum power consumption and the busbar connection is as shown below:
    -------------------------------------------------------------------------------
    COMPONENT PWR.CONS. VOLTAGE BUSBAR C/B
    -------------------------------------------------------------------------------
    DFDR 8.5 W 115 V AC 202XP NORM 7TU
    DFDR 7.5 VA 28 V DC 202XP NORM 7TU
    FDIMU 41 W 115 V AC 202XP NORM 5TV
    LA 0.6 VA 28 V DC 204PP NORM 9TU
    -------------------------------------------------------------------------------

F Power Supply ** ON A/C NOT FOR ALL

  • The FDIMU is supplied from the AC-NORM busbar through circuit breaker [5TV] .
  • The DFDR is supplied from the AC-NORM busbar through circuit breaker [7TU] . The power-interlock controls the operation of the DFDR.
  • The LA is supplied from the DC-NORM busbar through circuit breaker [9TU] .
  • The power interlock relays are supplied from the DC-ESS busbar through circuit breaker [26RK] .
    The maximum power consumption and the busbar connection are shown in the table below:
    ----------------------------------------------------------------------------
    COMPONENT ! PWR.CONS. ! VOLTAGE ! BUSBAR ! C/B
    ----------------------------------------------------------------------------
    DFDR 11.2 W 115VAC 202XP NORM 7TU
    FDIMU 40 W 115VAC 202XP NORM 5TV
    LA 2.1 VA 28VDC 204PP NORM 9TU
    ----------------------------------------------------------------------------

F Power Supply ** ON A/C NOT FOR ALL
  • The FDIMU is supplied from the AC-NORM busbar through circuit breaker [5TV] .
  • The DFDR is supplied from the AC-NORM busbar through circuit breaker [7TU] . The power-interlock controls the operation of the DFDR.
  • The LA is supplied from the DC-NORM busbar through circuit breaker [9TU] .
  • The power interlock relays are supplied from the DC-ESS busbar through circuit breaker [26RK] .

    The maximum power consumption and the busbar connection are shown in the table below:
    ----------------------------------------------------------------------------
    COMPONENT ! PWR.CONS. ! VOLTAGE ! BUSBAR ! C/B
    ----------------------------------------------------------------------------
    DFDR 11.2 W 115VAC 202XP NORM 7TU
    FDIMU 41 W 115VAC 202XP NORM 5TV
    LA 2.1 VA 28VDC 204PP NORM 9TU
    ----------------------------------------------------------------------------

F Power Supply ** ON A/C NOT FOR ALL
  • The FDIMU is supplied from the AC-NORM busbar through circuit breaker [5TV] .
  • The QAR is supplied from the AC-NORM busbar through circuit breaker [14TU] and from the DC-NORM busbar through circuit breaker [9TU] .
  • The DFDR is supplied from the AC-NORM busbar through circuit breaker [7TU] . The power-interlock controls the operation of the DFDR.
  • The LA is supplied from the DC-NORM busbar through circuit breaker [9TU] .
  • The power interlock relays are supplied from the DC-ESS busbar through circuit breaker [26RK] .

    The maximum power consumption and the busbar connection are shown in the table below:
    -------------------------------------------------------------------------------
    COMPONENT PWR CONSUMPT VOLTAGE BUSBAR C/B
    -------------------------------------------------------------------------------
    DFDR 11.2 W 115VAC 202XP NORM 7TU
    WGL-QAR 23 W 115VAC 202XP NORM 14TU
    WGL-QAR ----- 28VDC 204PP NORM 9TU
    FDIMU 41 W 115VAC 202XP NORM 5TV
    LA 0.6 VA 28VDC 204PP NORM 9TU
    -------------------------------------------------------------------------------

F Power Supply ** ON A/C NOT FOR ALL
  • The FDIMU is supplied from the AC-NORM busbar through circuit breaker [5TV] .
  • The QAR is supplied from the AC-NORM busbar through circuit breaker [14TU] and from the DC-NORM busbar through circuit breaker [9TU] .
  • The DFDR is supplied from the AC-NORM busbar through circuit breaker [7TU] . The power-interlock controls the operation of the DFDR.
  • The LA is supplied from the DC-NORM busbar through circuit breaker [9TU] .
  • The power interlock relays are supplied from the DC-ESS busbar through circuit breaker [26RK] .
    The maximum power consumption and the busbar connection are shown in the table below:
    -------------------------------------------------------------------------------
    COMPONENT PWR CONSUMPT VOLTAGE BUSBAR C/B
    -------------------------------------------------------------------------------
    DFDR 11.2 W 115VAC 202XP NORM 7TU
    WGL-QAR 23 W 115VAC 202XP NORM 14TU
    WGL-QAR ----- 28VDC 204PP NORM 9TU
    FDIMU 40 W 115VAC 202XP NORM 5TV
    LA 0.6 VA 28VDC 204PP NORM 9TU
    -------------------------------------------------------------------------------

For information of the Power Supply refer to (Ref. AMM D/O 31-39-00-00)
** ON A/C NOT FOR ALL
5. Interface
A. FDIU Input Sources
F Block Diagram of Parameter Sources
F Block Diagram of Parameter Sources ** ON A/C NOT FOR ALL
The following systems are connected to the FDIU:
(1) Electrical Flight Control System (Ref. AMM D/O 27-90-00-00)
  • FCDC1, FCDC2 (3CE1, 3CE2)
(2) Independent Instruments System (Ref. 31-20-00)
  • GMT CLOCK (2FS).
(3) Central Warning System (Ref. AMM D/O 31-50-00-00)
  • FWC1, FWC2 (1WW1, 1WW2)
  • SDAC1, SDAC2 (1WV1, 1WV2).
(4) Electronic Instrument System (Ref. AMM D/O 31-60-00-00)
  • DMC1, DMC2 (1WT1, 1WT2).
(5) Wheel and Brakes (Ref. AMM D/O 31-60-00-00)
  • BSCU (10GG).
(6) Power Supply of Input Sources
All parameter source systems are supplied by their own system power supplies.
B. FDIMU (FDIU-Part) Input Sources
F Block Diagram of Parameter Sources ** ON A/C NOT FOR ALL
F Block Diagram of Parameter Sources ** ON A/C NOT FOR ALL
F Block Diagram of Parameter Sources ** ON A/C NOT FOR ALL
The following systems are connected to the FDIU-part of the FDIMU:
(1) Electrical Flight Control System (Ref. AMM D/O 27-90-00-00)
  • FCDC1, FCDC2 (3CE1, 3CE2).
(2) Independent Instruments System (Ref. 31-20-00)
  • GMT CLOCK (2FS).
(3) Central Warning System (Ref. AMM D/O 31-50-00-00)
  • FWC1, FWC2 (1WW1, 1WW2)
  • SDAC1, SDAC2 (1WV1, 1WV2).
(4) Electronic Instrument System (Ref. AMM D/O 31-60-00-00)
  • DMC1, DMC2 (1WT1, 1WT2).
(5) Wheel and Brakes (Ref. AMM D/O 31-60-00-00)
  • BSCU (10GG).
(6) Power Supply of Input Sources
All parameter source systems are supplied by their own system power supplies.
C. Parameters
The information about the parameters are in the Flight-Data Recording Parameter-Library (FDRPL).
D. FDIU Input/Output Pin Assignment
F DFDRS - Input Schematic
F DFDRS - Input Schematic ** ON A/C NOT FOR ALL
The connection between the related computers and the FDIU is shown in the DFDRS inputs schematic.
The summary of the input and output pin assignment is shown in:
  • Table 1 for the discrete inputs
  • Table 2 for the discrete outputs
  • Table 3 for the bus inputs
  • Table 4 for the bus outputs
  • Table 5 for power supply and digital ground.
  • Table 6 for the connector inputs and outputs.
E. FDIMU (FDIU-Part) Input/Output Pin Assignment
F DFDRS - Input Schematic ** ON A/C NOT FOR ALL
The connection between the related computers and the FDIMU (FDIU-part) is shown in the DFDRS inputs schematic.
The summary of the input and output pin assignment is shown in:
  • Table 1 for the discrete inputs
  • Table 2 for the discrete outputs
  • Table 3 for the bus inputs
  • Table 4 for the bus outputs.
For the power supply, the test connector and the digital ground pin assignment refer to ATA 31-36-00 (Ref. AMM D/O 31-36-00-00).
+------------------------------------------------------------------+
! FDIU DISCRETE INPUTS !
!------------------------------------------------------------------!
! Connector ! Pin ! Explanation !
!-----------!-----!------------------------------------------------!
! MP ! 9A ! DFDR BITE !
! ! ! !
! MP ! 11G ! QAR Fail (if installed) !
! ! ! !
! MP ! 11H ! QAR Tape Low !
! ! ! !
! TP ! 15G ! Event Marker !
!------------------------------------------------------------------!
! PROGRAM PINS !
!------------------------------------------------------------------!
! ! ! !
! TP ! 1A ! Program Common !
! ! ! !
! TP ! 2A ! Program Ident MSB !
! TP ! 3A ! Program Ident LSB !
! ! ! !
! TP ! 1B ! Fleet Ident MSB !
! TP ! 2B ! Fleet Ident !
! TP ! 3B ! Fleet Ident !
! TP ! 4B ! Fleet Ident LSB !
! ! ! !
! TP ! 1C ! A/C Type Ident MSB !
! TP ! 2C ! A/C Type Ident !
! TP ! 3C ! A/C Type Ident !
! TP ! 4C ! A/C Type Ident !
! TP ! 5C ! A/C Type Ident !
! TP ! 6C ! A/C Type Ident LSB !
! ! ! !
! TP ! 1D ! A/C Tail Number Char. 1 MSB !
! TP ! 2D ! A/C Tail Number Char. 1 !
! TP ! 3D ! A/C Tail Number Char. 1 !
! TP ! 4D ! A/C Tail Number Char. 1 !
! TP ! 5D ! A/C Tail Number Char. 1 !
! TP ! 6D ! A/C Tail Number Char. 1 LSB !
! ! ! !
! TP ! 1E ! A/C Tail Number Char. 2 MSB !
! TP ! 2E ! A/C Tail Number Char. 2 !
! TP ! 3E ! A/C Tail Number Char. 2 !
! TP ! 4E ! A/C Tail Number Char. 2 !
! TP ! 5E ! A/C Tail Number Char. 2 !
! TP ! 6E ! A/C Tail Number Char. 2 LSB !
! ! ! !
! TP ! 1F ! A/C Tail Number Char. 3 MSB !
! TP ! 2F ! A/C Tail Number Char. 3 !
! TP ! 3F ! A/C Tail Number Char. 3 !
! TP ! 4F ! A/C Tail Number Char. 3 !
! TP ! 5F ! A/C Tail Number Char. 3 !
! TP ! 6F ! A/C Tail Number Char. 3 LSB !
! ! ! !
! TP ! 1G ! A/C Tail Number Char. 4 MSB !
! TP ! 2G ! A/C Tail Number Char. 4 !
! TP ! 3G ! A/C Tail Number Char. 4 !
! TP ! 4G ! A/C Tail Number Char. 4 !
! TP ! 5G ! A/C Tail Number Char. 4 !
! TP ! 6G ! A/C Tail Number Char. 4 LSB !
! ! ! !
! TP ! 1H ! A/C Tail Number Char. 5 MSB !
! TP ! 2H ! A/C Tail Number Char. 5 !
! TP ! 3H ! A/C Tail Number Char. 5 !
! TP ! 4H ! A/C Tail Number Char. 5 !
! TP ! 5H ! A/C Tail Number Char. 5 !
! TP ! 6H ! A/C Tail Number Char. 5 LSB !
! ! ! !
! TP ! 1J ! A/C Tail Number Char. 6 MSB !
! TP ! 2J ! A/C Tail Number Char. 6 !
! TP ! 3J ! A/C Tail Number Char. 6 !
! TP ! 4J ! A/C Tail Number Char. 6 !
! TP ! 5J ! A/C Tail Number Char. 6 !
! TP ! 6J ! A/C Tail Number Char. 6 LSB !
! ! ! !
! TP ! 1K ! A/C Tail Number Char. 7 MSB !
! TP ! 2K ! A/C Tail Number Char. 7 !
! TP ! 3K ! A/C Tail Number Char. 7 !
! TP ! 4K ! A/C Tail Number Char. 7 !
! TP ! 5K ! A/C Tail Number Char. 7 !
! TP ! 6K ! A/C Tail Number Char. 7 LSB !
+------------------------------------------------------------------+


Table 1 - FDIU Summary of Discrete Inputs
Remarks: Each of the progr. pins are coded by either 'open' or connected to the
program common pin (TP 1A). The connection to the program common pin
indicates the 'one' state.


+------------------------------------------------------------------+
! FDIMU (FDIU-Part) DISCRETE INPUTS !
!------------------------------------------------------------------!
! Connector ! Pin ! Explanation !
!-----------!-----!------------------------------------------------!
! MP ! 11E ! DFDR BITE !
! ! ! !
! MP ! 11F ! QAR Fail (if installed) !
! ! ! !
! MP ! 11G ! QAR Tape Low !
! ! ! !
! MP ! 11H ! Event Marker !
! ! ! !
! TP ! 14F ! MDDU Select !
!------------------------------------------------------------------!
! PROGRAM PINS !
!------------------------------------------------------------------!
! ! ! !
! TP ! 7G ! Program Common !
! ! ! !
! TP ! 7E ! Program Ident MSB !
! TP ! 7F ! Program Ident LSB !
! ! ! !
! MP ! 7E ! Fleet Ident MSB !
! MP ! 7F ! Fleet Ident !
! MP ! 7G ! Fleet Ident !
! MP ! 7H ! Fleet Ident LSB !
! ! ! !
! TP ! 8A ! A/C Type Ident MSB !
! TP ! 9A ! A/C Type Ident !
! TP ! 10A ! A/C Type Ident !
! TP ! 8B ! A/C Type Ident !
! TP ! 9B ! A/C Type Ident !
! TP ! 10B ! A/C Type Ident LSB !
! ! ! !
! TP ! 8C ! A/C Tail Number Char. 1 MSB !
! TP ! 9C ! A/C Tail Number Char. 1 !
! TP ! 10D ! A/C Tail Number Char. 1 !
! TP ! 8D ! A/C Tail Number Char. 1 !
! TP ! 9D ! A/C Tail Number Char. 1 !
! TP ! 10D ! A/C Tail Number Char. 1 LSB !
! ! ! !
! TP ! 8E ! A/C Tail Number Char. 2 MSB !
! TP ! 9E ! A/C Tail Number Char. 2 !
! TP ! 10E ! A/C Tail Number Char. 2 !
! TP ! 8F ! A/C Tail Number Char. 2 !
! TP ! 9F ! A/C Tail Number Char. 2 !
! TP ! 10F ! A/C Tail Number Char. 2 LSB !
! ! ! !
! TP ! 8G ! A/C Tail Number Char. 3 MSB !
! TP ! 9G ! A/C Tail Number Char. 3 !
! TP ! 10G ! A/C Tail Number Char. 3 !
! TP ! 8H ! A/C Tail Number Char. 3 !
! TP ! 9H ! A/C Tail Number Char. 3 !
! TP ! 10F ! A/C Tail Number Char. 3 LSB !
! ! ! !
! MP ! 8A ! A/C Tail Number Char. 4 MSB !
! MP ! 9A ! A/C Tail Number Char. 4 !
! MP ! 10A ! A/C Tail Number Char. 4 !
! MP ! 8B ! A/C Tail Number Char. 4 !
! MP ! 9B ! A/C Tail Number Char. 4 !
! MP ! 10B ! A/C Tail Number Char. 4 LSB !
! ! ! !
! MP ! 8C ! A/C Tail Number Char. 5 MSB !
! MP ! 9C ! A/C Tail Number Char. 5 !
! MP ! 10C ! A/C Tail Number Char. 5 !
! MP ! 8D ! A/C Tail Number Char. 5 !
! MP ! 9D ! A/C Tail Number Char. 5 !
! MP ! 10D ! A/C Tail Number Char. 5 LSB !
! ! ! !
! MP ! 8E ! A/C Tail Number Char. 6 MSB !
! MP ! 9E ! A/C Tail Number Char. 6 !
! MP ! 10E ! A/C Tail Number Char. 6 !
! MP ! 8F ! A/C Tail Number Char. 6 !
! MP ! 9F ! A/C Tail Number Char. 6 !
! MP ! 10F ! A/C Tail Number Char. 6 LSB !
! ! ! !
! MP ! 8G ! A/C Tail Number Char. 7 MSB !
! MP ! 9G ! A/C Tail Number Char. 7 !
! MP ! 10G ! A/C Tail Number Char. 7 !
! MP ! 8H ! A/C Tail Number Char. 7 !
! MP ! 9H ! A/C Tail Number Char. 7 !
! MP ! 10H ! A/C Tail Number Char. 7 LSB !
+------------------------------------------------------------------+


Table 1 - FDIMU (FDIU-Part) Summary of Discrete Inputs
Remarks: Each of the progr. pins are coded by either 'open' or connected to the
program common pin (TP 7G). The connection to the program common pin
indicates the 'one' state.


+------------------------------------------------------------------+
! FDIMU (FDIU-Part) DISCRETE INPUTS !
!------------------------------------------------------------------!
! Connector ! Pin ! Explanation !
!-----------!-----!------------------------------------------------!
! MP ! 11E ! DFDR BITE !
! ! ! !
! MP ! 11F ! QAR Fail (if installed) !
! ! ! !
! MP ! 11G ! QAR Tape Low !
! ! ! !
! MP ! 11H ! Event Marker !
! ! ! !
! TP ! 14F ! Load Enable !
!------------------------------------------------------------------!
! PROGRAM PINS !
!------------------------------------------------------------------!
! ! ! !
! TP ! 7G ! Program Common !
! ! ! !
! TP ! 7E ! Program Ident MSB !
! TP ! 7F ! Program Ident LSB !
! ! ! !
! MP ! 7E ! Fleet Ident MSB !
! MP ! 7F ! Fleet Ident !
! MP ! 7G ! Fleet Ident !
! MP ! 7H ! Fleet Ident LSB !
! ! ! !
! TP ! 8A ! A/C Type Ident MSB !
! TP ! 9A ! A/C Type Ident !
! TP ! 10A ! A/C Type Ident !
! TP ! 8B ! A/C Type Ident !
! TP ! 9B ! A/C Type Ident !
! TP ! 10B ! A/C Type Ident LSB !
! ! ! !
! TP ! 8C ! A/C Tail Number Char. 1 MSB !
! TP ! 9C ! A/C Tail Number Char. 1 !
! TP ! 10D ! A/C Tail Number Char. 1 !
! TP ! 8D ! A/C Tail Number Char. 1 !
! TP ! 9D ! A/C Tail Number Char. 1 !
! TP ! 10D ! A/C Tail Number Char. 1 LSB !
! ! ! !
! TP ! 8E ! A/C Tail Number Char. 2 MSB !
! TP ! 9E ! A/C Tail Number Char. 2 !
! TP ! 10E ! A/C Tail Number Char. 2 !
! TP ! 8F ! A/C Tail Number Char. 2 !
! TP ! 9F ! A/C Tail Number Char. 2 !
! TP ! 10F ! A/C Tail Number Char. 2 LSB !
! ! ! !
! TP ! 8G ! A/C Tail Number Char. 3 MSB !
! TP ! 9G ! A/C Tail Number Char. 3 !
! TP ! 10G ! A/C Tail Number Char. 3 !
! TP ! 8H ! A/C Tail Number Char. 3 !
! TP ! 9H ! A/C Tail Number Char. 3 !
! TP ! 10F ! A/C Tail Number Char. 3 LSB !
! ! ! !
! MP ! 8A ! A/C Tail Number Char. 4 MSB !
! MP ! 9A ! A/C Tail Number Char. 4 !
! MP ! 10A ! A/C Tail Number Char. 4 !
! MP ! 8B ! A/C Tail Number Char. 4 !
! MP ! 9B ! A/C Tail Number Char. 4 !
! MP ! 10B ! A/C Tail Number Char. 4 LSB !
! ! ! !
! MP ! 8C ! A/C Tail Number Char. 5 MSB !
! MP ! 9C ! A/C Tail Number Char. 5 !
! MP ! 10C ! A/C Tail Number Char. 5 !
! MP ! 8D ! A/C Tail Number Char. 5 !
! MP ! 9D ! A/C Tail Number Char. 5 !
! MP ! 10D ! A/C Tail Number Char. 5 LSB !
! ! ! !
! MP ! 8E ! A/C Tail Number Char. 6 MSB !
! MP ! 9E ! A/C Tail Number Char. 6 !
! MP ! 10E ! A/C Tail Number Char. 6 !
! MP ! 8F ! A/C Tail Number Char. 6 !
! MP ! 9F ! A/C Tail Number Char. 6 !
! MP ! 10F ! A/C Tail Number Char. 6 LSB !
! ! ! !
! MP ! 8G ! A/C Tail Number Char. 7 MSB !
! MP ! 9G ! A/C Tail Number Char. 7 !
! MP ! 10G ! A/C Tail Number Char. 7 !
! MP ! 8H ! A/C Tail Number Char. 7 !
! MP ! 9H ! A/C Tail Number Char. 7 !
! MP ! 10H ! A/C Tail Number Char. 7 LSB !
+------------------------------------------------------------------+


Table 1 - FDIMU (FDIU-Part) Summary of Discrete Inputs
Remarks: Each of the progr. pins are coded by either 'open' or connected to the
program common pin (TP 7G). The connection to the program common pin
indicates the 'one' state.


+------------------------------------------------------------------+
! FDIMU (FDIU-Part) DISCRETE INPUTS !
!------------------------------------------------------------------!
! Connector ! Pin ! Explanation !
!-----------!-----!------------------------------------------------!
! MP ! 11E ! DFDR BITE : Open Line = Fault !
! ! ! !
! MP ! 11F ! QAR FAIL ; GND = Fault !
! ! ! !
! MP ! 11G ! QAR MEDIA LOW : GND = Tape low !
! ! ! !
! MP ! 11H ! EVENT MARKER : Open Line = Event !
! ! ! !
! TP ! 14F ! Load Enable !
!------------------------------------------------------------------!
! PROGRAM PINS !
!------------------------------------------------------------------!
! ! ! !
! TP ! 7G ! Program Common !
! ! ! !
! TP ! 7E ! Program Ident MSB !
! TP ! 7F ! Program Ident LSB !
! ! ! !
! MP ! 7E ! Fleet Ident MSB !
! MP ! 7F ! Fleet Ident !
! MP ! 7G ! Fleet Ident !
! MP ! 7H ! Fleet Ident LSB !
! ! ! !
! TP ! 8A ! A/C Type Ident MSB !
! TP ! 9A ! A/C Type Ident !
! TP ! 10A ! A/C Type Ident !
! TP ! 8B ! A/C Type Ident !
! TP ! 9B ! A/C Type Ident !
! TP ! 10B ! A/C Type Ident LSB !
! ! ! !
! TP ! 8C ! A/C Tail Number Char. 1 MSB !
! TP ! 9C ! A/C Tail Number Char. 1 !
! TP ! 10C ! A/C Tail Number Char. 1 !
! TP ! 8D ! A/C Tail Number Char. 1 !
! TP ! 9D ! A/C Tail Number Char. 1 !
! TP ! 10D ! A/C Tail Number Char. 1 LSB !
! ! ! !
! TP ! 8E ! A/C Tail Number Char. 2 MSB !
! TP ! 9E ! A/C Tail Number Char. 2 !
! TP ! 10E ! A/C Tail Number Char. 2 !
! TP ! 8F ! A/C Tail Number Char. 2 !
! TP ! 9F ! A/C Tail Number Char. 2 !
! TP ! 10F ! A/C Tail Number Char. 2 LSB !
! ! ! !
! TP ! 8G ! A/C Tail Number Char. 3 MSB !
! TP ! 9G ! A/C Tail Number Char. 3 !
! TP ! 10G ! A/C Tail Number Char. 3 !
! TP ! 8H ! A/C Tail Number Char. 3 !
! TP ! 9H ! A/C Tail Number Char. 3 !
! TP ! 10H ! A/C Tail Number Char. 3 LSB !
! ! ! !
! MP ! 8A ! A/C Tail Number Char. 4 MSB !
! MP ! 9A ! A/C Tail Number Char. 4 !
! MP ! 10A ! A/C Tail Number Char. 4 !
! MP ! 8B ! A/C Tail Number Char. 4 !
! MP ! 9B ! A/C Tail Number Char. 4 !
! MP ! 10B ! A/C Tail Number Char. 4 LSB !
! ! ! !
! MP ! 8C ! A/C Tail Number Char. 5 MSB !
! MP ! 9C ! A/C Tail Number Char. 5 !
! MP ! 10C ! A/C Tail Number Char. 5 !
! MP ! 8D ! A/C Tail Number Char. 5 !
! MP ! 9D ! A/C Tail Number Char. 5 !
! MP ! 10D ! A/C Tail Number Char. 5 LSB !
! ! ! !
! MP ! 8E ! A/C Tail Number Char. 6 MSB !
! MP ! 9E ! A/C Tail Number Char. 6 !
! MP ! 10E ! A/C Tail Number Char. 6 !
! MP ! 8F ! A/C Tail Number Char. 6 !
! MP ! 9F ! A/C Tail Number Char. 6 !
! MP ! 10F ! A/C Tail Number Char. 6 LSB !
! ! ! !
! MP ! 8G ! A/C Tail Number Char. 7 MSB !
! MP ! 9G ! A/C Tail Number Char. 7 !
! MP ! 10G ! A/C Tail Number Char. 7 !
! MP ! 8H ! A/C Tail Number Char. 7 !
! MP ! 9H ! A/C Tail Number Char. 7 !
! MP ! 10H ! A/C Tail Number Char. 7 LSB !
+------------------------------------------------------------------+


Table 1 - FDIMU (FDIU-Part) Summary of Discrete Inputs
Remarks: Each of the program pins are coded 'open' or connected to the
program common pin (TP 1A). The connection to the program common pin
indicates the "one" state.


+------------------------------------------------------------------+
! FDIMU (FDIU-Part) DISCRETE INPUTS !
!------------------------------------------------------------------!
! Connector ! Pin ! Explanation !
!-----------!-----!------------------------------------------------!
! MP ! 11E ! permanent Ground !
! ! ! !
! MP ! 11F ! QAR FAIL ; GND = Fault !
! ! ! !
! MP ! 11G ! QAR MEDIA LOW : GND = Tape low !
! ! ! !
! MP ! 11H ! EVENT MARKER : Open Line = Event !
! ! ! !
! TP ! 14F ! Load Enable !
!------------------------------------------------------------------!
! PROGRAM PINS !
!------------------------------------------------------------------!
! ! ! !
! TP ! 7G ! Program Common !
! ! ! !
! TP ! 7E ! Program Ident MSB !
! TP ! 7F ! Program Ident LSB !
! ! ! !
! MP ! 7E ! Fleet Ident MSB !
! MP ! 7F ! Fleet Ident !
! MP ! 7G ! Fleet Ident !
! MP ! 7H ! Fleet Ident LSB !
! ! ! !
! TP ! 8A ! A/C Type Ident MSB !
! TP ! 9A ! A/C Type Ident !
! TP ! 10A ! A/C Type Ident !
! TP ! 8B ! A/C Type Ident !
! TP ! 9B ! A/C Type Ident !
! TP ! 10B ! A/C Type Ident LSB !
! ! ! !
! TP ! 8C ! A/C Tail Number Char. 1 MSB !
! TP ! 9C ! A/C Tail Number Char. 1 !
! TP ! 10C ! A/C Tail Number Char. 1 !
! TP ! 8D ! A/C Tail Number Char. 1 !
! TP ! 9D ! A/C Tail Number Char. 1 !
! TP ! 10D ! A/C Tail Number Char. 1 LSB !
! ! ! !
! TP ! 8E ! A/C Tail Number Char. 2 MSB !
! TP ! 9E ! A/C Tail Number Char. 2 !
! TP ! 10E ! A/C Tail Number Char. 2 !
! TP ! 8F ! A/C Tail Number Char. 2 !
! TP ! 9F ! A/C Tail Number Char. 2 !
! TP ! 10F ! A/C Tail Number Char. 2 LSB !
! ! ! !
! TP ! 8G ! A/C Tail Number Char. 3 MSB !
! TP ! 9G ! A/C Tail Number Char. 3 !
! TP ! 10G ! A/C Tail Number Char. 3 !
! TP ! 8H ! A/C Tail Number Char. 3 !
! TP ! 9H ! A/C Tail Number Char. 3 !
! TP ! 10H ! A/C Tail Number Char. 3 LSB !
! ! ! !
! MP ! 8A ! A/C Tail Number Char. 4 MSB !
! MP ! 9A ! A/C Tail Number Char. 4 !
! MP ! 10A ! A/C Tail Number Char. 4 !
! MP ! 8B ! A/C Tail Number Char. 4 !
! MP ! 9B ! A/C Tail Number Char. 4 !
! MP ! 10B ! A/C Tail Number Char. 4 LSB !
! ! ! !
! MP ! 8C ! A/C Tail Number Char. 5 MSB !
! MP ! 9C ! A/C Tail Number Char. 5 !
! MP ! 10C ! A/C Tail Number Char. 5 !
! MP ! 8D ! A/C Tail Number Char. 5 !
! MP ! 9D ! A/C Tail Number Char. 5 !
! MP ! 10D ! A/C Tail Number Char. 5 LSB !
! ! ! !
! MP ! 8E ! A/C Tail Number Char. 6 MSB !
! MP ! 9E ! A/C Tail Number Char. 6 !
! MP ! 10E ! A/C Tail Number Char. 6 !
! MP ! 8F ! A/C Tail Number Char. 6 !
! MP ! 9F ! A/C Tail Number Char. 6 !
! MP ! 10F ! A/C Tail Number Char. 6 LSB !
! ! ! !
! MP ! 8G ! A/C Tail Number Char. 7 MSB !
! MP ! 9G ! A/C Tail Number Char. 7 !
! MP ! 10G ! A/C Tail Number Char. 7 !
! MP ! 8H ! A/C Tail Number Char. 7 !
! MP ! 9H ! A/C Tail Number Char. 7 !
! MP ! 10H ! A/C Tail Number Char. 7 LSB !
+------------------------------------------------------------------+


Table 1 - FDIMU (FDIU-Part) Summary of Discrete Inputs
Remarks: Each of the program pins are coded 'open' or connected to the
program common pin (TP 1A). The connection to the program common pin
indicates the "one" state.


+------------------------------------------------------------------+
! FDIU DISCRETE OUTPUTS !
!------------------------------------------------------------------!
! Connector ! Pin ! Explanation !
!-----------!-----!------------------------------------------------!
! MP ! 9B ! FDIU BITE !
+------------------------------------------------------------------+


Table 2 - FDIU Summary of Discrete Outputs

+------------------------------------------------------------------+
! FDIMU (FDIU-Part) DISCRETE OUTPUTS !
!------------------------------------------------------------------!
! Connector ! Pin ! Explanation !
!-----------!-----!------------------------------------------------!
! TP ! 15C ! FDIU FAIL !
+------------------------------------------------------------------+


Table 2 - FDIMU (FDIU-Part) Summary of Discrete Outputs

+------------------------------------------------------------------+
! FDIMU (FDIU-Part) DISCRETE OUTPUTS !
!------------------------------------------------------------------!
! Connector ! Pin ! Explanation !
!-----------!-----!------------------------------------------------!
! TP ! 15C ! FDIU FAIL : Open Line = Fault !
+------------------------------------------------------------------+


Table 2 - FDIMU (FDIU-Part) Summary of Discrete Outputs

+------------------------------------------------------------------+
! FDIU BUS INPUTS !
!------------------------------------------------------------------!
! Connector ! PIN ! Speed ! Source ! Port !
! ! HI ! LO ! HI ! LO ! ! No !
!-----------!-----!------------------------------------------------!
! TP ! 5A ! 5B ! X ! ! FWC 1 ! 1 !
! MP ! 5A ! 5B ! X ! ! FWC 2 ! 2 !
! MP ! 7J ! 7K ! ! X ! CLOCK ! 3 !
! TP ! 7J ! 7K ! ! ! SPARE ! 4 !
! MP ! 6A ! 6B ! ! ! SPARE ! 5 !
! MP ! 9E ! 9F ! ! X ! CFDS ! 6 !
! MP ! 8A ! 8B ! ! X ! FCDC2 ! 7 !
! TP ! 8A ! 8B ! ! X ! FCDC1 ! 8 !
! MP ! 8E ! 8F ! ! ! SPARE ! 9 !
! TP ! 7A ! 7B ! X ! ! SDAC 1 ! 10 !
! MP ! 7A ! 7B ! X ! ! SDAC 2 ! 11 !
! TP ! 7E ! 7F ! X ! ! DMC 1 ! 12 !
! MP ! 7E ! 7F ! X ! ! DMC 2 ! 13 !
! TP ! 8E ! 8F ! ! ! SPARE ! 14 !
! MP ! 8J ! 8K ! ! X ! BSCU2 ! 15 !
! TP ! 8J ! 8K ! ! X ! BSCU1 ! 16 !
! TP ! 9E ! 9F ! ! ! DFDR-REPLAY ! !
! ! ! ! ! !(HAV.-BI-PHASE)! !
+------------------------------------------------------------------+


Table 3 - FDIU Summary of Bus Inputs

+---------------------------------------------------------------------------+
! FDIMU (FDIU-Part) BUS INPUTS !
!---------------------------------------------------------------------------!
! Connector ! PIN ! Speed ! Source ! Port !Shared with !
! ! HI ! LO ! HI ! LO ! ! No ! DMU-Part !
!-----------!-----!--------------------------------------------!------------!
! TP ! 6A ! 6B ! X ! ! FWC 1 ! 18 ! X !
! MP ! 6A ! 6B ! X ! ! FWC 2 ! 42 ! X !
! MP ! 2A ! 2B ! ! X ! CLOCK ! - ! !
! MP ! 4C ! 4D ! ! X ! CFDS ! - ! !
! MP ! 3C ! 3D ! ! X ! FCDC2 ! 36 ! X !
! TP ! 3C ! 3D ! ! X ! FCDC1 ! 12 ! X !
! TP ! 6G ! 6H ! X ! ! SDAC 1 ! 10 ! X !
! MP ! 6G ! 6H ! X ! ! SDAC 2 ! 45 ! X !
! TP ! 6C ! 6D ! X ! ! DMC 1 ! 19 ! X !
! MP ! 6C ! 6D ! X ! ! DMC 2 ! 43 ! X !
! TP ! 2J ! 2K ! ! X ! BSCU1 ! 10 ! X !
! MP ! 2J ! 2K ! ! X ! BSCU2 ! 34 ! X !
! MP ! 12C! 12D ! X ! ! MDDU ! - ! !
! MP ! 12G! 12H ! ! ! DFDR-REPLAY ! - ! !
! ! ! ! ! !(HAV.-BI-PHASE)! ! !
+---------------------------------------------------------------------------+


Table 3 - FDIMU (FDIMU-Part) Summary of Bus Inputs

+---------------------------------------------------------------------------+
! FDIMU (FDIU-Part) BUS INPUTS !
!---------------------------------------------------------------------------!
! Connector ! PIN ! Speed ! Source ! Port !Shared with !
! ! HI ! LO ! HI ! LO ! ! No ! DMU-Part !
!-----------!-----!--------------------------------------------!------------!
! TP ! 6A ! 6B ! X ! ! FWC 1 ! 18 ! X !
! MP ! 6A ! 6B ! X ! ! FWC 2 ! 42 ! X !
! MP ! 2A ! 2B ! ! X ! CLOCK ! - ! !
! MP ! 4C ! 4D ! ! X ! CFDS ! - ! !
! MP ! 3C ! 3D ! ! X ! FCDC2 ! 36 ! X !
! TP ! 3C ! 3D ! ! X ! FCDC1 ! 12 ! X !
! TP ! 6G ! 6H ! X ! ! SDAC 1 ! 10 ! X !
! MP ! 6G ! 6H ! X ! ! SDAC 2 ! 45 ! X !
! TP ! 6C ! 6D ! X ! ! DMC 1 ! 19 ! X !
! MP ! 6C ! 6D ! X ! ! DMC 2 ! 43 ! X !
! TP ! 2J ! 2K ! ! X ! BSCU1 ! 10 ! X !
! MP ! 2J ! 2K ! ! X ! BSCU2 ! 34 ! X !
! MP ! 12C! 12D ! X ! ! PDL ! - ! !
! MP ! 12G! 12H ! ! ! DFDR-REPLAY ! - ! !
! ! ! ! ! !(HAV.-BI-PHASE)! ! !
+---------------------------------------------------------------------------+


Table 3 - FDIMU (FDIMU-Part) Summary of Bus Inputs

+---------------------------------------------------------------------------+
! FDIMU (FDIU-Part) BUS INPUTS !
!---------------------------------------------------------------------------!
! Connector ! PIN ! Speed ! Source ! Port !Shared with !
! ! HI ! LO ! HI ! LO ! ! No ! DMU-Part !
!-----------!-----!--------------------------------------------!------------!
! TP ! 6A ! 6B ! X ! ! FWC 1 ! ! X !
! MP ! 6A ! 6B ! X ! ! FWC 2 ! ! X !
! MP ! 2A ! 2B ! ! X ! CLOCK ! ! !
! MP ! 4C ! 4D ! ! X ! CFDIU ! ! !
! MP ! 3C ! 3D ! ! X ! FCDC2 ! ! X !
! TP ! 3C ! 3D ! ! X ! FCDC1 ! ! X !
! TP ! 6G ! 6H ! X ! ! SDAC 1 ! ! X !
! MP ! 6G ! 6H ! X ! ! SDAC 2 ! ! X !
! TP ! 6C ! 6D ! X ! ! DMC 1 ! ! X !
! MP ! 6C ! 6D ! X ! ! DMC 2 ! ! X !
! TP ! 2J ! 2K ! ! X ! BSCU1 ! ! X !
! MP ! 2J ! 2K ! ! X ! BSCU2 ! ! X !
! MP ! 12C! 12D ! X ! ! PDL ! ! !
! TP ! 4J ! 4K ! ! X ! ISIS ! ! !
! ! ! ! ! ! anemometric ! ! !
! MP ! 4J ! 4K ! X ! ! ISIS ! ! !
! ! ! ! ! ! inertial bus ! ! !
! MP ! 12G! 12H ! ! ! DFDR-PLAY-BACK! ! !
! ! ! ! ! ! (HAVARD-BI- ! ! !
! ! ! ! ! ! -PHASE) ! ! !
+---------------------------------------------------------------------------+


Table 3 - FDIMU (FDIMU-Part) Summary of Bus Inputs

+---------------------------------------------------------------------------+
! FDIMU (FDIU-Part) BUS INPUTS !
!---------------------------------------------------------------------------!
! Connector ! PIN ! Speed ! Source ! Port !Shared with !
! ! HI ! LO ! HI ! LO ! ! No ! DMU-Part !
!-----------!-----!--------------------------------------------!------------!
! TP ! 6A ! 6B ! X ! ! FWC 1 ! ! X !
! MP ! 6A ! 6B ! X ! ! FWC 2 ! ! X !
! MP ! 2A ! 2B ! ! X ! CLOCK ! ! !
! MP ! 4C ! 4D ! ! X ! CFDIU ! ! !
! MP ! 3C ! 3D ! ! X ! FCDC2 ! ! X !
! TP ! 3C ! 3D ! ! X ! FCDC1 ! ! X !
! TP ! 6G ! 6H ! X ! ! SDAC 1 ! ! X !
! MP ! 6G ! 6H ! X ! ! SDAC 2 ! ! X !
! TP ! 6C ! 6D ! X ! ! DMC 1 ! ! X !
! MP ! 6C ! 6D ! X ! ! DMC 2 ! ! X !
! TP ! 2J ! 2K ! ! X ! BSCU1 ! ! X !
! MP ! 2J ! 2K ! ! X ! BSCU2 ! ! X !
! MP ! 12C! 12D ! X ! ! PDL ! ! !
! TP ! 4J ! 4K ! ! X ! ISIS ! ! !
! ! ! ! ! ! anemometric ! ! !
! MP ! 4J ! 4K ! X ! ! ISIS ! ! !
! ! ! ! ! ! inertial bus ! ! !
! MP ! 12G ! 12H ! ! ! FDIMU-PLAY- ! ! !
! ! ! ! ! ! BACK(Input to ! ! !
! ! ! ! ! ! Output of the ! ! !
! ! ! ! ! ! FDIMU) ! ! !
+---------------------------------------------------------------------------+


Table 3 - FDIMU (FDIMU-Part) Summary of Bus Inputs

+-----------------------------------------------------------------------+
! FDIU BUS OUTPUTS !
!-----------------------------------------------------------------------!
! Connector ! PIN ! Speed ! Source ! Remarks !
! ! HI ! LO ! HI ! LO ! ! !
!-----------!-----!-----------------------------------------------------!
! MP ! 9J ! 9K ! ! X ! CFDIU ! ARINC 429 !
! TP ! 9A ! 9B ! ! ! QAR ! RZ- CODE !
! ! ! ! ! !(if installed)! !
! TP ! 15A ! 15B ! ! ! CVR ! AUDIO OUTPUT !
! TP ! 9J ! 9K ! ! ! DFDR ! HAVARD-Bi-PHASE!
+-----------------------------------------------------------------------+

Table 4 - FDIU Summary of Bus Outputs


+------------------------------------------------------------------------+
! FDIMU (FDIU-Part) BUS OUTPUTS !
!------------------------------------------------------------------------!
! Connector ! PIN ! Speed ! Destination ! Remarks !
! ! HI ! LO ! HI ! LO ! ! !
!-----------!-----!------------------------------------------------------!
! TP ! 12E ! 12F ! ! X ! CFDIU ! ARINC 429 !
! TP ! 13C ! 13D ! ! ! QAR ! RZ- CODE !
! ! ! ! ! ! (if installed)! !
! TP ! 12C ! 12D ! ! ! CVR ! AUDIO OUTPUT !
! TP ! 12G ! 12H ! ! ! DFDR ! HAVARD-Bi-PHASE!
! TP ! 12J ! 12K ! X ! ! MDDU ! ARINC 429 !
+------------------------------------------------------------------------+

Table 4 - FDIMU (FDIU-Part) Summary of Bus Outputs


+------------------------------------------------------------------+
! FDIMU (FDIU-Part) BUS OUTPUTS !
!------------------------------------------------------------------!
! Connector ! PIN ! Speed ! Source ! Remarks !
! ! HI ! LO ! HI ! LO ! ! !
!-----------!-----!------------------------------------------------!
! TP ! 12E ! 12F ! ! X ! CFDIU ! ARINC 429 !
! TP ! 13C ! 13D ! ! ! QAR ! RZ- CODE !
! TP ! 12C ! 12D ! ! ! CVR ! AUDIO OUTPUT !
! TP ! 12G ! 12H ! ! ! DFDR ! HAVARD-BI-PHASE!
! TP ! 12J ! 12K ! X ! ! PDL ! ARINC 429 !
+------------------------------------------------------------------+

Table 4 - FDIMU (FDIU-Part) Summary of Bus Outputs


+------------------------------------------------------------------+
! FDIMU (FDIU-Part) BUS OUTPUTS !
!------------------------------------------------------------------!
! Connector ! PIN ! Speed ! Source ! Remarks !
! ! HI ! LO ! HI ! LO ! ! !
!-----------!-----!------------------------------------------------!
! TP ! 12E ! 12F ! ! X ! CFDIU ! ARINC 429 !
! TP ! 13C ! 13D ! ! ! QAR ! RZ- CODE !
! TP ! 12C ! 12D ! ! ! CVR ! AUDIO OUTPUT !
! TP ! 12G ! 12H ! ! ! DFDR ! HAVARD-BI-PHASE!
! TP ! 12J ! 12K ! X ! ! PDL ! ARINC 429 !
+------------------------------------------------------------------+

Table 4 - FDIMU (FDIU-Part) Summary of Bus Outputs


+------------------------------------------------------------------+
! FDIMU (FDIU-Part) BUS OUTPUTS !
!------------------------------------------------------------------!
! Connector ! PIN ! Speed ! Source ! Remarks !
! ! HI ! LO ! HI ! LO ! ! !
!-----------!-----!------------------------------------------------!
! TP ! 12E ! 12F ! ! X ! CFDIU ! ARINC 429 !
! TP ! 13C ! 13D ! ! ! QAR ! RZ- CODE !
! TP ! 12C ! 12D ! ! ! CVR ! AUDIO OUTPUT !
! TP ! 12G ! 12H ! ! ! CVDR 1/2! HAVARD-Bi-PHASE!
! TP ! 12J ! 12K ! X ! ! MDDU ! ARINC 429 !
+------------------------------------------------------------------+

Table 4 - FDIMU (FDIU-Part) Summary of Bus Outputs


+------------------------------------------------------------------+
! FDIU DIGITAL GROUND, CASE GROUND AND POWER SUPPLY !
!------------------------------------------------------------------!
! Connector ! PIN ! EXPLANATION !
!-----------!-----!------------------------------------------------!
! TP ! 15J ! DIGITAL GROUND !
! TP ! 15K ! CASE GROUND !
! MP ! 15J ! DIGITAL GROUND !
! MP ! 15K ! CASE GROUND !
! BP ! 1 ! 115 V AC !
! BP ! 7 ! 115 V AC GROUND !
+------------------------------------------------------------------+

Table 5 - FDIU Power Supply and Digital Ground


-----------------------------------------------------------------------------
! Pin ! Assignment !
!---------!-------------------------------------------------------------------!
! 1 ! RS232 Data IN !
! 2 ! RS232 Data OUT !
! 3 ! RS232 RTS !
! 4 ! RS232 CTS !
! 5 ! Digital Ground (*) !
! 6 ! RS232 DTR (reserved) !
! 7 ! RS232 DSR (reserved) !
! 8 ! FDIU Load Control (*) !
! 9 ! + 5 V DC - Power Supply !
! 10 ! + 5 V DC - Power Supply (RAM) !
! 11 ! + 15 V DC - Power Supply !
! 12 ! Spare !
! 13 ! 115 V AC (H) !
! 14 ! Portable CDU ARINC Input (A) !
! 15 ! Portable CDU ARINC Input (B) !
! 16 ! FDIU ARINC 429 Output (A) !
! 17 ! FDIU ARINC 429 Output (B) !
! 18 ! DFDR Harvard Bi-Phase Output (A) !
! 19 ! DFDR Harvard Bi-Phase Output (B) !
! 20 ! DFDR Harvard Bi-Phase Playback (A) !
! 21 ! DFDR Harvard Bi-Phase Playback (B) !
! 22 ! Spare !
! 23 ! - 15 V DC - Power Supply !
! 24 ! Case Ground !
! 25 ! 115 V AC (L) !
-----------------------------------------------------------------------------
Test Connector Pin Assignment - Table 6

-----------------------------------------------------------------------------
! Pin ! Assignment !
!---------!-------------------------------------------------------------------!
! 1 ! RS232 Data IN !
! 2 ! RS232 Data OUT !
! 3 ! RS232 RTS !
! 4 ! RS232 CTS !
! 5 ! Digital Ground (*) !
! 6 ! RS232 DTR (reserved) !
! 7 ! RS232 DSR (reserved) !
! 8 ! FDIU Load Control (*) !
! 9 ! + 5 V DC - Power Supply !
! 10 ! + 5 V DC - Power Supply (RAM) !
! 11 ! + 15 V DC - Power Supply !
! 12 ! Spare !
! 13 ! 115 V AC (H) !
! 14 ! Portable CDU ARINC Input (A) !
! 15 ! Portable CDU ARINC Input (B) !
! 16 ! FDIU ARINC 429 Output (A) !
! 17 ! FDIU ARINC 429 Output (B) !
! 18 ! CVDR Harvard Bi-Phase Output (A) !
! 19 ! CVDR Harvard Bi-Phase Output (B) !
! 20 ! FDIMU Wire Loop for Playback (A) !
! 21 ! FDIMU Wire Loop for Playback (B) !
! 22 ! Spare !
! 23 ! - 15 V DC - Power Supply !
! 24 ! Case Ground !
! 25 ! 115 V AC (L) !
-----------------------------------------------------------------------------
Test Connector Pin Assignment - Table 6

** ON A/C NOT FOR ALL
6. Component Description
F Flight Data Interface and Management Unit
F Flight Data Interface Unit ** ON A/C NOT FOR ALL
F Functional Block Diagram
F Functional Block Diagram ** ON A/C NOT FOR ALL
F System Internal Interface
F System Internal Interface ** ON A/C NOT FOR ALL
A. Flight Data Interface Unit (FDIU) FIN: 2-TU

The FDIU is a microprocessor controlled unit with modules for the collection of discrete and digital parameters and for their conversion to a recordable form. The function and the electrical interface complies with ARINC 717.
If more than one data bus with the same content, e.g. SDAC 1 and SDAC 2, is connected to the FDIU, the data from system 1 is recorded on the DFDR. This is as long as the appropriate SSM bits are valid and the data is updated. Invalid data from system 1 is replaced with the appropriate data from system 2. If one system has bad SSM bits or unrefreshed data, data from the other system are recorded. If no valid data is available for the DFDR recording, then related data bits are set to zero and in the next mainframe period the respective data bits are set to one.
It is possible to record two different versions of parameters on the DFDR. The selection for one version is made by the Pin-Programming. If it is not coded, the FDIU uses the code from the last flight. In case of missing information from the last flight, the FDIU works with Version 1. The two record versions fulfil the different authority's requirements:

Version 1: 64 Words/sec
Version 2: 128 Words/sec
B. Flight Data Interface and Management Unit (FDIMU)
F Flight Data Interface and Management Unit ** ON A/C NOT FOR ALL
F Flight Data Interface and Management Unit ** ON A/C NOT FOR ALL
F Flight Data Interface and Management Unit ** ON A/C NOT FOR ALL
F Functional Block Diagram ** ON A/C NOT FOR ALL
F Functional Block Diagram ** ON A/C NOT FOR ALL
F System Internal Interface ** ON A/C NOT FOR ALL
The FDIMU is a microprocessor controlled unit, used for the collection of discrete and digital A/C parameters and for their conversion to a recordable form. The FDIMU puts together the functions of the DFDRS and the AIDS (REF: 31-36-00). It has two internal main parts. These parts are:
  • The FDIU-part, which controls the DFDRS
  • The DMU-part, which controls the AIDS (Refer to 31-36-00).
    The function and the electrical interface complies with ARINC 717.

    If more than one data bus with the same content, e.g. SDAC 1 and SDAC 2, is connected to the FDIU-part, the data from system 1 is recorded on the DFDR. This is as long as the appropriate SSM bits are valid and the data is updated. Invalid data from system 1 is replaced with the appropriate data from system 2. If one system has bad SSM bits or unrefreshed data, data from the other system are recorded. If no valid data is available for the DFDR recording, then related data bits are set to zero and in the next mainframe period the respective data bits are set to one.
The FDIU-part can record five different versions (frames) of parameters on the DFDR. The selection for one version is made by the A/C Pin-Programming. If a version is not set, the FDIU-part uses the code from the last flight. In case of missing information from the last flight, the FDIU-part works with Version 2 (CFMI frame) and record speed 128 W/s. The five record versions fulfil the different authority's requirements:

  • Version 1 and 2: ED55 parameter frame (1 to 57 parameters), record speed 128 Words/sec
  • Version 3,4 and 5: FAR 121.344 parameter frame (1 to 88 parameters), record speed 256 Word/sec.
F Flight Data Interface and Management Unit ** ON A/C NOT FOR ALL
F Functional Block Diagram
F Functional Block Diagram ** ON A/C NOT FOR ALL
F System Internal Interface ** ON A/C NOT FOR ALL
The FDIMU is a microprocessor controlled unit, used for the collection of discrete and digital A/C parameters and for their conversion to a recordable form. The FDIMU puts together the functions of the DFDRS and the AIDS (REF: 31-36-00). It has two internal main parts. These parts are:
  • The FDIU-part, which controls the DFDRS
  • The DMU-part, which controls the AIDS (Refer to 31-36-00).
    The function and the electrical interface complies with ARINC 717.

    If more than one data bus with the same content, e.g. SDAC 1 and SDAC 2, is connected to the FDIU-part, the data from system 1 is recorded on the DFDR. This is as long as the appropriate SSM bits are valid and the data is updated. Invalid data from system 1 is replaced with the appropriate data from system 2. If one system has bad SSM bits or unrefreshed data, data from the other system are recorded. If no valid data is available for the DFDR recording, then related data bits are set to zero and in the next mainframe period the respective data bits are set to one.
The FDIU-part can record five different versions (frames) of parameters on the DFDR. The selection for one version is made by the A/C Pin-Programming. If a version is not set, the FDIU-part uses the code from the last flight. In case of missing information from the last flight, the FDIU-part works with Version 2 (CFMI frame) and record speed 128 W/s. The five record versions fulfil the different authority's requirements:

  • Version 1 and 2: ED55 parameter frame (1 to 57 parameters), record speed 128 Words/sec
F Flight Data Interface and Management Unit ** ON A/C NOT FOR ALL
F Functional Block Diagram ** ON A/C NOT FOR ALL
F Functional Block Diagram ** ON A/C NOT FOR ALL
F System Internal Interface ** ON A/C NOT FOR ALL
The FDIMU is a single box which includes three main parts:
  • The FDIU-part, which controls the DFDRS
  • The DMU-Part, which controls the AIDS (Ref. AMM D/O 31-36-00-00)
  • The Integrated Customer ACMS Recorder (ICAR).

    The FDIMU is a rectangular casing box according to standard ARINC 600 - 3MCU.

    The maximal weight of the FDIMU is 6.0 kg.

    The unit box has cooling in/outlets on the top and on the bottom.

    The front panel of the FDIMU consists of:
  • A carrying handle
  • An access door to get access to a test connector, a PCMCIA insertion slot and an SAR switch (the SAR switch is used to backup the SAR and reports memory while the unit is momentarily removed).

    The test connector is used for:
  • PDL connection
  • Maintenance test equipment connection (dialogue with PC fitted with PTE software).

    The rear has:
  • A connector with three blocks marked TP, MP, BP
  • A back-up batteries box for SAR memories (three cells AA-3.6V - 2.1 AH type).

The FDIMU is equipped with a motherboard and separate cards. The cards are called:
  • ARIFDIMU-card
  • CPUDMU-card
  • ALFDIMU-card
  • ED48-FDIU-card.
F Flight Data Interface and Management Unit ** ON A/C NOT FOR ALL
F Functional Block Diagram ** ON A/C NOT FOR ALL
F System Internal Interface ** ON A/C NOT FOR ALL
The FDIMU is a microprocessor controlled unit. Its primary function is to collect discrete and digital A/C parameters and change them until it is possible to record them. The FDIMU puts together the functions of the DFDRS and the AIDS (Ref. AMM D/O 31-36-00-00). It has two internal primary parts. These parts are:
The FDIU-part gets the data from the connected ARINC 429 buses and controls the DFDR, QAR and ARINC 429 output and input data streams. In the case in which it is possible to get alternative data from the connected ARINC 429 buses, the FDIU-part uses various logic:

The FDIU-part uses for data acquisition the parameter definition list. In these parameter list some special logic's (e.g. SDI priority, Boolean rules) are included.

If it is possible to get data from more then one ARINC 429 bus with the same content (DMC1 and DMC2, connected to FDIU), the data from system 1 is used for data recording as long as the appropriate SSM bits are valid and the data is updated.

If there are invalid data from system 1, the FDIU-part gets the appropriate data from system 2. The logic is given in the table below:
+-----------------------------------------------------------------+
! ! System 1 !
! Switching !-----------------------------------------------!
! Logic ! Refresh DATA ! Refresh DATA ! Unrefresh DATA !
! ! SSM OK ! SSM BAD ! !
!-----------------!-----------------------------------------------!
! S ! Refresh DATA! System 1 ! System 2 ! System 2 !
! Y ! SSM OK ! ! ! !
! S !-------------!---------------!--------------!----------------!
! T ! Refresh DATA! System 1 ! * ! * !
! E ! SSM BAD ! ! ! !
! M !-------------!---------------!--------------!----------------!
! ! Unrefresh ! System 1 ! * ! * !
! 2 ! DATA ! ! ! !
+-----------------------------------------------------------------+

The FDIU-part can record seven different versions (frames) of parameters on the DFDR. The A/C pin-programming and record speed programming gives the selection of one version. If there is no coding, the FDIU-part uses the code from the last flight. If there is no information from the last flight, the FDIU-part uses Version 5 (PW frame) and record speed 1024 W/sec.

As long as only one speed (1024 w/s) is available, no fault message is generated if the Pin Programming is not recognized.
+------------------------------------------------------+
! Record Speed ! TP 7E (MSB) ! TP 7F (LSB) !
!-----------------!----------------!-------------------!
! 1024 W/s ! 0 ! 0 (no coding)!
! 1024 W/s ! 0 ! 1 !
! spare ! 1 ! 0 !
! spare ! 1 ! 1 !
+------------------------------------------------------+

+--------------------------------------------------------------+
! Version-Engine-Type ! Aircraft-Type-Coding ! Record Version !
!---------------------!----------------------!-----------------!
! Version 1 - IAE ! 010100 ! 001 !
! Version 2 - CFMI ! 010011 ! 010 !
! Version 3 - PW ! 011100 ! 101 !
! Version 4 - CFM NEO ! 110011 ! 110 !
! Version 5 - PW NEO ! 111100 ! 111 (no coding)!
+--------------------------------------------------------------+

Each pin is coded by "open" or connected to the program general pin (TP 7G). The connection to the same program shows the "one" state.
Remark:
Version 1, 2 and 3 contain the ED55 parameter frame and the FAR 121.344-88- parameter frame at a record speed of 1024 W/sec.
Version 4 and 5 contain the DFDR frame with the ED112 parameter frame and the FAR 121.344-88-parameter list at a record speed of 1024 W/sec.
F Flight Data Interface and Management Unit ** ON A/C NOT FOR ALL
F Functional Block Diagram ** ON A/C NOT FOR ALL
F Functional Block Diagram ** ON A/C NOT FOR ALL
F System Internal Interface ** ON A/C NOT FOR ALL
The FDIMU is a microprocessor controlled unit. Its primary function is to collect discrete and digital A/C parameters and change them until it is possible to record them. The FDIMU puts together the functions of the DFDRS and the AIDS (Ref. AMM D/O 31-36-00-00). It has two internal primary parts. These parts are:
The FDIU-part gets the data from the connected ARINC 429 buses and controls the DFDR, QAR and ARINC 429 output and input data streams. In the case in which it is possible to get alternative data from the connected ARINC 429 buses, the FDIU-part uses various logic:
If it is possible to get data from more then one ARINC 429 bus with the same content (DMC1 and DMC2, connected to FDIU), the data from system 1 is used for data recording as long as the appropriate SSM bits are valid and the data is updated.

If there are invalid data from system 1, the FDIU-part gets the appropriate data from system 2. The logic is given in the table below:
+-----------------------------------------------------------------+
! ! System 1 !
! Switching !-----------------------------------------------!
! Logic ! Refresh DATA ! Refresh DATA ! Unrefresh DATA !
! ! SSM OK ! SSM BAD ! !
!-----------------!-----------------------------------------------!
! S ! Refresh DATA! System 1 ! System 2 ! System 2 !
! Y ! SSM OK ! ! ! !
! S !-------------!---------------!--------------!----------------!
! T ! Refresh DATA! System 1 ! * ! * !
! E ! SSM BAD ! ! ! !
! M !-------------!---------------!--------------!----------------!
! ! Unrefresh ! System 1 ! * ! * !
! 2 ! DATA ! ! ! !
+-----------------------------------------------------------------+

The FDIU-part can record seven different versions (frames) of parameters on the DFDR. The A/C pin-programming and record speed programming gives the selection of one version. If there is no coding, the FDIU-part uses the code from the last flight. If there is no information from the last flight, the FDIU-part uses Version 2 (CFMI frame) and Record Speed 128 W/sec.

+-----------------+----------------+-------------------+
! Record Speed ! TP 7E (MSB) ! TP 7F (LSB) !
!-----------------!----------------!-------------------!
! 128 W/s ! 0 ! 0 (no coding)!
! 256 W/s ! 0 ! 1 !
! 128 W/s ! 1 ! 0 !
! 512 W/s ! 1 ! 1 !
+-----------------+----------------+-------------------+

+--------------------------------------------------------------+
! Version-Engine-Type ! Aircraft-Type-Coding ! Record Version !
!---------------------!----------------------!-----------------!
! Version 1 - IAE ! 010100 ! 001 !
! Version 2 - CFMI ! 010011 ! 010 (no coding)!
! Version 3 - IAE ! 011100 ! 011 !
! Version 4 - CFMI ! 110011 ! 100 !
! Version 5 - PW ! 111100 ! 101 !
+---------------------+----------------------+-----------------+

Each pin is coded by "open" or connected to the program general pin (TP 7G). The connection to the same program shows the "one" state.
Remark:
Version 1, 2 and contain the ED55 parameter frame at a record speed of 128 W/s.
Version 3,4 and 5 contain the FAR 121.344-88-parameter frame at a record speed of 256 W/s.
F Flight Data Interface and Management Unit ** ON A/C NOT FOR ALL
F Functional Block Diagram ** ON A/C NOT FOR ALL
F ** ON A/C NOT FOR ALL
The FDIMU is a microprocessor controlled unit. Its primary function is to collect discrete and digital A/C parameters and change them until it is possible to record them. The FDIMU puts together the functions of the DFDRS and the AIDS (Ref. AMM D/O 31-36-00-00). It has two internal primary parts. These parts are:
The FDIU-part gets the data from the connected ARINC 429 buses and controls the CVDRs, QAR and ARINC 429 output and input data streams. In the case in which it is possible to get alternative data from the connected ARINC 429 buses, the FDIU-part uses various logic:

The FDIU-part uses for data acquisition the parameter definition list. In these parameter list some special logic's (e.g. SDI priority, Boolean rules) are included.

If it is possible to get data from more then one ARINC 429 bus with the same content (DMC1 and DMC2, connected to FDIU), the data from system 1 is used for data recording as long as the appropriate SSM bits are valid and the data is updated.

If there are invalid data from system 1, the FDIU-part gets the appropriate data from system 2. The logic is given in the table below:
+-----------------------------------------------------------------+
! ! System 1 !
! Switching !-----------------------------------------------!
! Logic ! Refresh DATA ! Refresh DATA ! Unrefresh DATA !
! ! SSM OK ! SSM BAD ! !
!-----------------!-----------------------------------------------!
! S ! Refresh DATA! System 1 ! System 2 ! System 2 !
! Y ! SSM OK ! ! ! !
! S !-------------!---------------!--------------!----------------!
! T ! Refresh DATA! System 1 ! * ! * !
! E ! SSM BAD ! ! ! !
! M !-------------!---------------!--------------!----------------!
! ! Unrefresh ! System 1 ! * ! * !
! 2 ! DATA ! ! ! !
+-----------------------------------------------------------------+

The FDIU-part can record seven different versions (frames) of parameters on the CVDRs. The A/C pin-programming and record speed programming gives the selection of one version. If there is no coding, the FDIU-part uses the code from the last flight. If there is no information from the last flight, the FDIU-part uses Version 5 (PW frame) and record speed 1024 W/sec.

As long as only one speed (1024 w/s) is available, no fault message is generated if the Pin Programming is not recognized.
+------------------------------------------------------+
! Record Speed ! TP 7E (MSB) ! TP 7F (LSB) !
!-----------------!----------------!-------------------!
! 1024 W/s ! 0 ! 0 (no coding)!
! 1024 W/s ! 0 ! 1 !
! spare ! 1 ! 0 !
! spare ! 1 ! 1 !
+------------------------------------------------------+

+--------------------------------------------------------------+
! Version-Engine-Type ! Aircraft-Type-Coding ! Record Version !
!---------------------!----------------------!-----------------!
! Version 1 - IAE ! 010100 ! 001 !
! Version 2 - CFMI ! 010011 ! 010 !
! Version 3 - PW ! 011100 ! 101 !
! Version 4 - CFM NEO ! 110011 ! 110 !
! Version 5 - PW NEO ! 111100 ! 111 (no coding)!
+--------------------------------------------------------------+

Each pin is coded by "open" or connected to the program general pin (TP 7G). The connection to the same program shows the "one" state.
Remark:
Version 1, 2 and 3 contain the ED55 parameter frame and the FAR 121.344-88- parameter frame at a record speed of 1024 W/sec.
Version 4 and 5 contain the CVDR frame with the ED112 parameter frame and the FAR 121.344-88-parameter list at a record speed of 1024 W/sec.
C. Input/Output Characteristics
(1) Parameter Inputs:
  • 16 DITS-ARINC 429 input ports, 12 ports Low/High speed selectable (Low: 12.28 Kbit/s, High: 100 Kbit/s)
  • 4 shunt discrete inputs.
(2) System Inputs:
  • DFDR playback data input - playback of the DFDR data for verification
  • DFDR BITE IN - status line from DFDR
(3) Parameter Inputs:
  • 16 DITS-ARINC 429 input ports, 12 ports Low/High speed selectable (Low: 12.28 Kbit/s, High: 100 Kbit/s)
  • 4 shunt discrete inputs.
(4) System Inputs:
  • DFDR playback data input - playback of the DFDR data for verification
  • DFDR BITE IN - status line from DFDR
  • QAR FAIL - status line from the QAR
  • QAR MEDIA LOW - media indication from the QAR
  • MDDU - select line.
(5) Parameter Inputs:
  • 15 DITS-ARINC 429 input ports, 10 shared with the DMU-part.
(6) System Inputs:
  • DFDR Playback Data Input - playback of the DFDR data for verification
  • DFDR BITE IN - status line from DFDR
  • 54 discrete inputs - used for A/C Identification
  • QAR FAIL (if QAR is installed) - status line from the QAR
  • QAR MEDIA LOW (if QAR is installed) - media indication from the QAR
  • event marker - status line from the event marker button in the cockpit
  • MDDU - select line
NOTE: The inputs listed above are only for the FDIU-part of the FDIMU.
(7) Parameter Inputs:
  • 15 DITS-ARINC 429 input ports, 10 shared with the DMU-part.
(8) System Inputs:
  • DFDR Playback Data Input - playback of the DFDR data for verification
  • DFDR BITE IN - status line from DFDR
  • 54 discrete inputs - used for A/C Identification
  • QAR FAIL (if QAR is installed) - status line from the QAR
  • QAR MEDIA LOW (if QAR is installed) - media indication from the QAR
  • Event marker - status line from the event marker button in the cockpit
  • PDL - select line.
NOTE: The inputs listed above are only for the FDIU-part of the FDIMU.
(9) Input Characteristics:

(a) Up to 32 ARINC 429 inputs, with MDDU and CFDIU (low-speed or high-speed under software control for each input).

(b) Up to 80 discrete shunt inputs with:
  • DFDR BITE - status line from DFDR
  • QAR FAIL (if QAR is installed) - status line from the QAR
  • QAR TAPE LOW (if QAR is installed) - media indication from the QAR
  • EVENT MARKER - status line from the EVENT BUTTON in the cockpit
  • MDDU - select line
  • Aircraft identification and spares.
(c) 1 interface to DFDR: two playback inputs.

(d) 1 input RS232 line (to/from test connector).
NOTE: The inputs listed above are only for the FDIU-part of the FDIMU.
(10) Parameter Inputs:

(a) Up to 32 ARINC 429 inputs including PDL and CFDIU (low-speed or high-speed under software control for each input).

(b) Up to 80 discrete shunt inputs including:
  • DFDR BITE - status line from DFDR
  • QAR FAIL (if QAR is installed) - status line from the QAR
  • QAR TAPE LOW (if QAR is installed) - media indication from the QAR
  • EVENT MARKER - status line from the EVENT BUTTON in the cockpit
  • PDL - select line
  • Aircraft identification and spares.
(c) 1 Interfaces to DFDR: two playback inputs.

(d) 1 Input RS232 line (to/from test connector).
NOTE: The inputs listed above are only for the FDIU-part of the FDIMU.
(11) Parameters Inputs
For Parameters Inputs refer to (Ref. AMM D/O 31-39-00-00)
(12) System Inputs
For System Inputs refer to (Ref. AMM D/O 31-39-00-00)
(13) Output Characteristics
  • 1 DITS-ARINC 429 output port (Low speed)
  • 1 DFDR bus, harvard biphase code
  • 64/128 words/sec, 12 bit each
  • 1 status line, a discrete output to send the FDIU status via SDAC to the CFDS
  • 1 asynchronous output for test purposes in RS 232 characteristic
  • 1 audio output for time synchronization of DFDR and Cockpit Voice Recorder (CVR)
(14) Output Characteristics
  • 1 DITS-ARINC 429 output port (Low speed)
  • 1 DFDR bus, harvard biphase code - 64/128 words/sec, 12 bit each
  • 1 QAR bus, RZ code - 64/128 words/sec., 12 bit each RS 232 characteristic
  • 1 status line, a discrete output to send the FDIU status via SDAC to the CFDS
  • 1 asynchronous output for test purposes in RS 232 characteristic
  • 1 audio output for time synchronization of DFDR and Cockpit Voice Recorder (CVR)
(15) Output Characteristics
  • 1 DITS-ARINC 429 output port (High speed)
  • 1 DITS-ARINC 429 output port (Low speed)
  • 1 DFDR bus, harvard biphase code - 256 words/sec
  • 1 QAR bus, RZ code (optional) - 256 words/sec
  • 1 status line, a discrete output to send the FDIU-part status through SDAC to the CFDS
  • 1 asynchronous output for test purposes in RS 232 characteristic
  • 1 audio output for time synchronization of DFDR and Cockpit Voice Recorder (CVR).
(16) Output Characteristics
1 DITS-ARINC 429 output port (High speed)
1 DITS-ARINC 429 output port (Low speed)
1 DFDR bus, harvard biphase code
  • 128 words/sec.
1 QAR bus, RZ code (optional)
  • 128 words/sec.
1 status line, a discrete output to send the FDIU-part status through SDAC to the CFDS
1 asynchronous output for test purposes in RS 232 characteristic
1 audio output for time synchronization of DFDR and Cockpit Voice Recorder (CVR).
(17) Output Characteristics
  • 1 DITS-ARINC 429 output port (high speed)
  • 1 DITS-ARINC 429 output port (low speed)
  • 2 DFDR busses, Harvard biphase code - 1024 words/sec
  • 1 QAR bus, RZ code (optional) - 1024 words/sec
  • 1 audio output for time synchronization of DFDR and Cockpit Voice Recorder (CVR).
(18) Output Characteristics:

  • 4 ARINC 429 outputs (speed for output are under software control, any output is isolated from the wiring also under software control)
  • 1 interface to DFDR: two outputs
  • 1 Synchro CVR output
  • 1 QAR output
  • 1 FDIU BITE output
  • 1 output RS232 line (to/from test connector).
NOTE: The outputs listed above are only for the FDIU-part of the FDIMU.
(19) Output Characteristics
For Output Characteristics refer to (Ref. AMM D/O 31-39-00-00)
(20) FDIU Functions
The functions of the FDIU are as given below:
  • Discrete parameter selection
  • Selection of parameters from ARINC 429 buses
  • Formatting of DFDR data output
  • Processing of DFDR playback
  • Built-In Test Equipment (BITE)
  • Serving the RS 232 tester interface
  • DFDR-CVR synchronization.
The processor circuitry is supplied with discrete and ARINC 429 parameters. The inputs are protected against overvoltage and wiring inversion. The processor circuits also filter, amplify, isolate and convert the input signals.
The discrete input data are mutiplexed (1 receiver) and the status of these signals is stored and updated in the memory. The discrete output data is available through the output interface. These signals are output in case of initialisation and if an output status must change.
The received ARINC 429 parameters are multiplexed and stored in the respective memory, controlled by input port, label and SDI. The ARINC 429 transmitter sends the BITE data from the DFDRS to the CFDIU. The recorder data for the DFDR is generated by the microprocessor and output through the harvard biphase ralated bipolar RZ interface.
The time reference for the Cockpit Voice Recorder (CVR) through AMU is generated and synchronized by the DFDR and output as an audio signal (frequence shift 4193 Hz = logic 0, 3607 Hz = logic 1).
The microprocessor generates the output formats for the DFDR and controls the RS 232 interface. The processor updates the data frames according to the received parameters. The whole data processing and interface control is managed on the processor board and the I/O board assembly.
(21) FDIU Functions
The functions of the FDIU are as given below:
  • Discrete parameter selection
  • Selection of parameters from ARINC 429 buses
  • Formatting of DFDR/QAR data output
  • Processing of DFDR playback
  • Built-In Test Equipment (BITE)
  • Serving the RS 232 tester interface
  • DFDR-CVR synchronization.
The processor circuitry is supplied with discrete and ARINC 429 parameters. The inputs are protected against overvoltage and wiring inversion. The processor circuits also filter, amplify, isolate and convert the input signals.
The discrete input data are mutiplexed (1 receiver) and the status of these signals is stored and updated in the memory. The discrete output data is available through the output interface. These signals are output in case of initialisation and if an output status must change.
The received ARINC 429 parameters are multiplexed and stored in the respective memory, controlled by input port, label and SDI. The ARINC 429 transmitter sends the BITE data from the DFDRS to the CFDIU. The recorder data for the DFDR and QAR are generated by the microprocessor and output through the harvard biphase related bipolar RZ interface.
The time reference for the Cockpit Voice Recorder (CVR) through AMU is generated and synchronized by the DFDR and output as an audio signal (frequence shift 4193 Hz = logic 0, 3607 Hz = logic 1).
The microprocessor generates the output formats for the DFDR/QAR and controls the RS 232 interface. The processor updates the data frames according to the received parameters. The whole data processing and interface control is managed on the processor board and the I/O board assembly.
(22) FDIMU (FDIU-Part) Functions
The functions of the FDIMU (FDIU-part) are given below:
  • Collect and format different critical flight parameters and supply the DFDR with data to record.
  • Supply a QAR (if installed) through a separate output with the same data frame as the DFDR.
  • Supply a PCMCIA media with the same data frame as the DFDR.
  • Supply an audio output, which is encoded with the GMT times to the CVR.
  • Do an integrity check for the acceleration parameter for each flight.
  • Communicate with the CFDS for maintenance.
  • Communicate through a test connector with the portable test equipment.
The processor circuitry of the FDIMU is supplied with discrete and ARINC 429 parameters. The inputs are protected against overvoltage and wiring inversion. The processor circuits also filter, amplify, isolate and the input signals.
The discrete input data are multiplexed (1 receiver) and the status of these signals is stored and updated in the memory. The discrete output data is available through the output interface. These signals are output at the initialization process and if an output status must change.
The received ARINC 429 parameters are multiplexed and stored in the related memory, controlled by the input port, label and SDI. The ARINC 429 transmitter sends the BITE data from the DFDRS to the CFDIU. The recorder data for the DFDR and QAR (if installed) are generated by the microprocessor and output through the Harvard-biphase related bipolar-RZ-interface.
The time reference for the Cockpit Voice Recorder (CVR) through the AMU is generated and synchronized by the DFDR and output as an audio signal (frequency shift 4193 Hz = logic 0, 3607 Hz = logic 1).
The microprocessor generates the output formats for the DFDR/QAR and controls the RS 232 interface. The processor uses the received parameters and updates the data frames. ALL the data processing and interface control is managed on the processor board and the I/O board assembly.
For the functions of the DMU-part, refer to (Ref. AMM D/O 31-36-00-00).
(23) FDIMU (FDIU-Part) Functions
The functions of the FDIMU (FDIU-part) are given below:
  • Collect and format different critical flight parameters and supply the CVDRs with data to record.
  • Supply a QAR (if installed) through a separate output with the same data frame as the CVDRs.
  • Supply a PCMCIA media with the same data frame as the CVDRs.
  • Supply an audio output, which is encoded with the UTC-times to the CVR-Parts of the CVDRs.
  • Do an integrity check for the acceleration parameter for each flight.
  • Communicate with the CFDS for maintenance.
  • Communicate through a test connector with the portable test equipment.
The processor circuitry of the FDIMU is supplied with discrete and ARINC 429 parameters. The inputs are protected against overvoltage and wiring inversion. The processor circuits also filter, amplify, isolate and the input signals.
The discrete input data are multiplexed (1 receiver) and the status of these signals is stored and updated in the memory. The discrete output data is available through the output interface. These signals are output at the initialization process and if an output status must change.
The received ARINC 429 parameters are multiplexed and stored in the related memory, controlled by the input port, label and SDI. The ARINC 429 transmitter sends the BITE data from the DFDRS to the CFDIU. The recorder data for the CVDRs and QAR (if installed) are generated by the microprocessor and output through the Harvard-biphase related bipolar-RZ-interface.
The time reference for the Cockpit Voice Recorder Parts (CVR-Parts) of the CDVRs through the AMU is generated and synchronized by the DFDR-Parts of the CVDRs and output as an audio signal (frequency shift 4193 Hz = logic 0, 3607 Hz = logic 1).
The microprocessor generates the output formats for the CVDRs/QAR and controls the RS 232 interface. The processor uses the received parameters and updates the data frames. ALL the data processing and interface control is managed on the processor board and the I/O board assembly.
For the functions of the DMU-part, refer to (Ref. AMM D/O 31-36-00-00).
(24) Verification of DFDR Playback Data
To verify the recorded data, the FDIU receives the playback data via a serial data bus. The sync word is checked every 64th/128th input for the proper sync pattern. If a defective sync pattern is detected, the DFDR PLAYBACK fault flag will be written into the fault memory of the FDIU. The FDIU also accepts DFDR data without playback.
(25) Verification of DFDR Playback Data
To verify the recorded data, the FDIMU (FDIU-part) receives playback data from the DFDR via a serial data bus. The sync word is checked every 128th input for the proper sync pattern. If a defective sync pattern is detected, the DFDR PLAYBACK fault flag is written into the fault memory of the FDIMU (FDIU-part). The FDIMU also accepts DFDR data without playback.
(26) Verification of DFDR Playback Data
The FDIMU (FDIU-part) compares the playback data from the DFDR with the applicable data transmitted to the DFDR. After DC2 command comes from CFDS, the FDIU makes sure that the playback data stream continuously.
If it is not possible to synchronize the playback data with the output data during 10 seconds a failure occurs.
The FDIU sends the failure in the FDIU BITE word, in the related DOCUMENTATION DATA word and in the fault message, label 356. After the FDIU receives the NULL command from CFDS the verification completes.
(27) Verification of DFDR Playback Data
To verify the recorded data, the FDIMU (FDIU-part) receives playback data from the DFDR through a serial data bus. The sync word is checked every 128th/256th input for the proper sync pattern. If a defective sync pattern is detected, the DFDR PLAYBACK fault flag is written into the fault memory of the FDIMU (FDIU-part). The FDIMU also accepts DFDR data without playback.
(28) Identification of Location
The FDIU recognizes its location on different aircraft by decoding the aircraft identification and aircraft type, the fleet and the DFDR format version. Parameter selection and data processing depends on this identification code. This information is input to the FDIU through 68 discrete input lines.
(29) Identification of Location
The FDIMU decodes the aircraft identification, the aircraft type, the fleet and the DFDR format version and recognizes its location on different aircraft.
The parameter selection and the data processing depend on this identification code. This information is input to the FDIMU through 54 discrete input lines.
(30) Identification of Location
The FDIMU decodes the aircraft identification, the aircraft type, the fleet and the CVDRs format version and recognizes its location on different aircraft.
The parameter selection and the data processing depend on this identification code. This information is input to the FDIMU through 54 discrete input lines.
(31) Mandatory Parameter Integrity Check
The FDIMU (FDIU-part) does a mandatory parameter integrity check during the flight. The results are stored in a non - volatile memory and recorded on the DFDR and the QAR (if installed). The three parameters shown below are checked during the flight phase "ENG SHUT DOWN".
-----------------------------------------------------------------
No Parameter Valid Value
-----------------------------------------------------------------
9 Normal Acceleration Average for 8 sec 1 +/- 0.2 g
10 Lateral Acceleration Average for 8 sec 0 +/- 0.2 g
11 Longitudinal Acceleration Average for 8 sec 0 +/- 0.2 g

The test condition is 15% less than N2 for all engines. The valid value is available for 8 seconds. The check is done once per second. When the flight phase and test condition criteria are achieved, the valid value must be true for at least one second for a pass result, if not the integrity result is flagged as failed. If the test is failed, it is processed as a Class II failure and the bit 17 in the coded information label 350.00 is set to one.

The internal Class II fault ACCELEROMETER (6TU) is only found on ground. To avoid the lost of the failure from the DFDRS LAST LEG CLASS REPORT this failure is copied from the ground memory related to the end of current leg into the flight memory related to the beginning of the new leg. This failure is stored, transmitted in normal mode and available through CFDIU menu after landing.
(32) Mandatory Parameter Integrity Check
The FDIU contains software to perform a Mandatory Parameter Integrity Check for a reasonable range during the flight. The results are stored in a nonvolatile memory and recorded on the DFDR in word 116 of subframe 2. The three parameters shown below are checked during the flight phase 'ENG SHUT DOWN'.
-------------------------------------------------------------
No Parameter Valid Value
-------------------------------------------------------------
9 Normal Acceleration 1 +/- 0.2 g
10 Lateral Acceleration 0 +/- 0.2 g
11 Longitudinal Acceleration 0 +/- 0.2 g

The test condition is 15% less than N2 for both engines. The valid value is available for 8 seconds. The check is done once per second. When the flight phase and the test condition criteria are met, the valid value must be true for at least one second for a pass result, if not the integrity result is flagged as failed. If the test is failed or not done during flight phase 10, it is a Class II failure.
(33) Mandatory Parameter Integrity Check
The FDIU monitors the condition of the 3-axis accelerometer at the start of each flight.
The FDIU contains software to do a mandatory parameter condition check for a satisfactory range during the flight. During the test the acceleration values from all three axis must stay in the limits from the table below:
---------------------------------------------------------
Parameter Correct Value
---------------------------------------------------------
Normal Acceleration Average for 8 sec. 1 +/- 0.2 g
Lateral Acceleration Average for 8 sec. 0 +/- 0.2 g
Longitudinal Acceleration Average for 8 sec. 0 +/- 0.2 g

When the flight phase 1 changes to flight phase 2 (flight phase transition from 1 to 2), the recorded 'Fail' and 'Not Run' bits are set:
  • 'Fail' to '0'
  • 'Not Run' to '1'.
After the set of the bits, the test starts. The test stops after 8 seconds. The average value for each acceleration above the full test sequence time is not more than the specified limits. If one of the values is more than the limit, the accelerometer axis is flagged as failed.
The non-volatile memory of the FDIU keeps the result and the DFDR/QAR records the related data words.
When the test completes, the set of the bits is done.
The flight memory keeps the result if the FDIU receives the DC2 instruction before the test completes.
The ground memory stores the fault and then moves it to the flight memory. This is applicable if the accelerometer test completes while in Null and when FDIU receives the DC2 instruction.
The bits stay as they are initialized above if the test does not run for full 8 seconds.
If during the test the accelerometer label is not correct, the test fails and the related 'Fail' bit is set.
The label is not valid if it is not changed or if the SSM is different from Normal Operation (11).
If the SSM is:
  • NCD (10): the input voltage is not in the limits (smaller than 0V and more than 6V)
  • FT (01): SDAC in functional test (not used)
  • FW (00): SDAC internal problem, the last valid value is given.
    The result of the accelerometer integrity check is the value of the bit 17 of the FDIU output-label 350. If one of the acceleration axis fails the bit is set to '1'.
    If the FDIU is installed in a new aircraft, the result is erased from the non-volatile memory.
    It is possible to start the test in CFDS the interactive mode (system test and ground scanning) on ground. These test results do not change the status of the 'Fail' and 'Not Run' bits.
(34) Mandatory Parameter Integrity Check
The FDIMU (FDIU-part) does a mandatory parameter integrity check during the flight. The results are stored in a non - volatile memory and recorded on the CVDRs and the QAR (if installed). The three parameters shown below are checked during the flight phase "ENG SHUT DOWN".
-----------------------------------------------------------------
No Parameter Valid Value
-----------------------------------------------------------------
9 Normal Acceleration Average for 8 sec 1 +/- 0.2 g
10 Lateral Acceleration Average for 8 sec 0 +/- 0.2 g
11 Longitudinal Acceleration Average for 8 sec 0 +/- 0.2 g

The test condition is 15% less than N2 for all engines. The valid value is available for 8 seconds. The check is done once per second. When the flight phase and test condition criteria are achieved, the valid value must be true for at least one second for a pass result, if not the integrity result is flagged as failed. If the test is failed, it is processed as a Class II failure and the bit 17 in the coded information label 350.00 is set to one.

The internal Class II fault ACCELEROMETER (6TU) is only found on ground. To avoid the lost of the failure from the DFDRS LAST LEG CLASS REPORT this failure is copied from the ground memory related to the end of current leg into the flight memory related to the beginning of the new leg. This failure is stored, transmitted in normal mode and available through CFDIU menu after landing.
(35) Test Connector
To enable the connection of a Portable MCDU or a Portable Data Loader (PDL), a test connector is installed on the front panel of the FDIU.
The interface for test and program is RS 232.
(36) Test Connector
To enable the connection of a Portable MCDU or a Portable Data Loader (PDL), a test connector is installed on the front panel of the FDIMU.
The interface for test and program is RS 232.
(37) DFDR-CVR Synchronization
The full 32 data bit word received from the GMT clock bus (label 150) is used to generate a frequency modulated output. This time code word is send to the CVR via audio output at a rate of 768 bit/sec every four seconds (at a beginning of each data frame) with LSB transmitted first.
D. Digital Flight Data Recorder (DFDR)
F Digital Flight Data Recorder ** ON A/C NOT FOR ALL
F DFDR - Functional Block Diagram ** ON A/C NOT FOR ALL
The DFDR is a solid state flight data recorder in compliance with ARINC 717. The DFDR stores all aircraft information in CMOS bulk erasable EEPROM (Flash Memory IC) devices. Being a solid state device, the DFDR has no moving parts. The recorder has the capability to store all data which the FDIU has collected over the last 25 hours. It is possible to get a storage capability of greater than 25 hours if the correct combination of SSFDR capacity and data rate is used.
F Digital Flight Data Recorder ** ON A/C NOT FOR ALL
F Digital Flight Data Recorder ** ON A/C NOT FOR ALL
F DFDR - Functional Block Diagram ** ON A/C NOT FOR ALL
F DFDR - Functional Block Diagram ** ON A/C NOT FOR ALL
The DFDR is a solid state flight data recorder in compliance with ARINC 717. The DFDR stores all aircraft information on CMOS bulk EEPROM (Flash Memory IC) devices that can be erased. Being a solid state device, the DFDR has no moving parts. The recorder has the capability to store all data which the FDIU (part of FDIMU) has collected over the last 25 hours. It is possible to get a storage capability of greater than 25 hours if the correct combination of SSFDR capacity and data rate is used.
F Digital Flight Data Recorder ** ON A/C NOT FOR ALL
F DFDR - Functional Block Diagram ** ON A/C NOT FOR ALL
The DFDR is a solid state flight data recorder in compliance with ARINC 717. The DFDR stores all aircraft information in Flash EEPROM Memory in the CSMU (Crash Survivable Memory Unit).
As a solid state device, the DFDR has no moving parts. The recorder has the capability to store all data which the FDIU (part of FDIMU) has collected over the last 25 hours. It is possible to get a storage capability of minimum 25 hours if the correct combination of SSFDR capacity and data rate is used.
For description of the CVDRs refer to (Ref. AMM D/O 31-39-00-00)
(1) Interface
F DFDR - Interface ** ON A/C NOT FOR ALL
The data input/output is connected to the FDIU (ARINC 429).
The DFDR transmits a time synchronization signal (GMT) once every 2 sec. at the rate of 1536 bits/sec. (128 words/sec). The actual speed rate of 128 words/sec. is set through a wiring modification at the DFDR. An optional interface allows to recover data by an Airborn Data Loader (ADL) through ARINC 615. Recovery of stored data occurs at 10 or 100 K/BIT as specified by ARINC 615. Real time data is available at 9600 baud rate.
(2) Interface
F DFDR - Interface ** ON A/C NOT FOR ALL
The data-input and data-output are connected to the FDIU-part of the FDIMU through the rear connector. The format on this line is coded in HARVARD BIPHASE with 256 words/s.

The DFDR STATUS-signal and the DFDR BITE-signal, which shows the correct operation of the DFDR, is continuously monitored by the FDIU-part. You can check the result through the CFDS-function.

It is possible to download recorded data on ground through the front-connector of the DFDR.
(3) Interface
F DFDR - Interface ** ON A/C NOT FOR ALL
F DFDR - Interface ** ON A/C NOT FOR ALL
F DFDR - Interface ** ON A/C NOT FOR ALL
The data input/output is connected to the FDIU-part of the FDIMU through the rear connector. The format on this line is coded in HARVARD BIPHASE. Pins 17 and 18 of the rear connector, set the data transfer rate of the serial HARVARD BIPHASE data. The DFDR automatically gets the rates of 64 words/s, 128 words/s, 256 words/s, 512 words/s, or 1024 words/s (1 word has 12 bits) from the FDIU-part.
The table bellow shows the data rate selection through pins 17 and 18:
+-----------------------------------------------------------------------------+
! Pin 17 ! Pin 18 ! Data Rate !
! (Data rate select B) ! (Data rate select A) ! !
!----------------------!----------------------!-------------------------------!
! Open ! Open ! 64 words/s or 1024 words/s !
! ! ! (one of the two is applicable)!
!----------------------!----------------------!-------------------------------!
! Open ! Ground ! 128 words/s !
!----------------------!----------------------!-------------------------------!
! Ground ! Open ! 256 words/s !
!----------------------!----------------------!-------------------------------!
! Ground ! Ground ! 512 words/s !
+-----------------------------------------------------------------------------+
The DFDR is a solid-state flight-data recorder in compliance with ARINC 747. The DFDR identification and failure words are transmitted continuously during flight.
It is possible to download recorded data on ground through the front-connector of the DFDR.
(4) Interface
F DFDR - Interface ** ON A/C NOT FOR ALL
The data input/output is connected to the FDIU-part of the FDIMU (ARINC 429). The format on this line is coded in HARVARD BIPHASE with 128 words/s, 256 words/s, 512 words/s or 1024 words/s. The DFDR is a solid-state flight-data recorder in compliance with ARINC 717. DFDR identification words and DFDR failure word are transmitted continuously during flight.
It is possible to download recorded data on ground through the front-connector of the DFDR.
(5) Interface
F DFDR - Interface ** ON A/C NOT FOR ALL
The data input/output is connected to the FDIU-part of the FDIMU through the rear connector. The format on this line is coded in HARVARD BIPHASE. Pins 17 and 18 of the rear connector set the data transfer rate of the serial HARVARD BIPHASE data. The DFDR automatically gets the rates of 64 words/s, 128 words/s, 256 words/s, 512 words/s, or 1024 words/s (1 word has 12 bits) from the FDIU-part.
The table bellow shows the data rate selection through pins 17 and 18:
-----------------------------------------------------------------------------
! Pin 17 ! Pin 18 ! Data Rate !
! (Data rate select B) ! (Data rate select A) ! !
!----------------------!----------------------!-------------------------------!
! Open ! Open ! 64 words/s or 1024 words/s !
! ! ! (one of the two is applicable)!
!----------------------!----------------------!-------------------------------!
! Open ! Ground ! 128 words/s !
!----------------------!----------------------!-------------------------------!
! Ground ! Open ! 256 words/s !
!----------------------!----------------------!-------------------------------!
! Ground ! Ground ! 512 words/s !
-----------------------------------------------------------------------------
The DFDR is a solid-state flight-data recorder in compliance with ARINC 717. The DFDR identification and failure words are transmitted continuously during flight.
It is possible to download recorded data on ground through the front-connector of the DFDR.
(6) DFDR Functions
Data is stored in shock protected solid state nonvolatile memory devices (CMOS). The recorder receives 128 words/sec series messages from the Flight Data Interface Unit (FDIU). The write mode is a single channel incremental block recording with inter-record gaps between each data block. One data block contains data received during one second (1536 BITS). Throughout this recording phase the DFDR continuously monitors its correct operation. If an abnormality occurs during this time it is automatically memorized (BITE function).The recording duration of the recorder is 25 hours under normal flying conditions. After the aircraft has landed, the memorized data can be transferred for analysis.
(7) DFDR Functions
Data is stored in shock protected solid state nonvolatile memory devices. The recorder is able to receive 64, 128 or 256 words/sec series messages from the FDIU-part of the FDIMU. The write mode is a single channel incremental block recording with inter-record gaps between each data block. One data block contains data received during one second. Throughout this recording phase the DFDR continuously monitors its correct operation. If an abnormality occurs during this time it is automatically memorized (BITE function). The recording duration of the recorder is 50 hours under normal flying conditions. After the aircraft has landed, the memorized data can be transferred for analysis.
(8) DFDR Functions
The DFDR stores digital flight data in a crash protected solid state memory. This solid state memory consists of a number of Flash EEPROM devices which will keep their contents if the power is removed. The DFDR is able to receive 128 or 256 words/s series messages (ARINC 717 format) from the FDIU-part of the FDIMU.
The data is recorded in 32K-Word Blocks divided in 512 logical pages of 64 words each. The first two pages contains header information (partition, channel and block number) and a bad page map. The remaining 510 pages stores the flight data.
The SSFDR software monitors the correct recording operation continuous and an incorrect function will be memorized (BITE).
The recording duration of the recorder is a minimum of 25 hours under normal flight conditions. After the aircraft has landed, the memorized data can be downloaded for analysis.
(9) DFDR Functions
The DFDR stores digital flight data in a crash protected solid state memory. This solid state memory consists of a number of Flash EEPROM devices which will keep their contents if the power is removed. The DFDR is able to receive 1024 words/s series messages (ARINC 747 format) from the FDIU-part of the FDIMU.
The data is recorded in 32K-Word Blocks divided in 512 logical pages of 64 words each. The first two pages contains header information (partition, channel and block number) and a bad page map. The remaining 510 pages stores the flight data.
The SSFDR software monitors the correct recording operation continuous and an incorrect function will be memorized (BITE).
The recording duration of the recorder is a minimum of 25 hours under normal flight conditions. After the aircraft has landed, the memorized data can be down loaded for analysis.
(10) DFDR Functions
The data is stored in a shock protected solid state non-volatile memory. The DFDR receives a 128 words/s, 256 words/s, 512 words/s or 1024 words/s series message from the FDIU-part of the FDIMU.
The write mode is a single channel incremental block recording with inter-record gaps between each data block. One data block contains data received during one second 128 words/s, 256 words/s, 512 words/s or 1024 words/s. Throughout this recording phase the DFDR continuously monitors its correct operation.
The recording duration of the recorder is 25 hours under normal flight conditions. After the aircraft has landed, the memorized data can be downloaded for analysis.
(11) DFDR Functions
A solid-state non-volatile memory keeps the data. The memory is shock-protected. You can remove it with the ground support equipment for system analysis. An ARINC 573/717 hardware interface accepts serial HARVARD BIPHASE data at a rate of 64 words/s, 128 words/s, 256 words/s, 512 words/s or 1024 words/s from the FDIU-part of the FDIMU.
A continuous data stream is received with each word immediately transmitted after its predecessor. The DFDR records data as it is received and does not try to synchronize to the incoming data stream. The time delay between data availability at the inputs pins and the storage of the data on the Crash Protected Memory (CPM) is not more than 0.5 seconds.
The DFDR keeps the last recent 25 hours of recorded flight in normal flight conditions. The record state stores flight data to the CPM.
(12) CVDR Functions
For CVDR Functions refer to (Ref. AMM D/O 31-39-00-00)
(13) Underwater Locator Beacon (ULB)
A ULB is attached directly to the front-panel of the DFDR.
The ULB transmits a radio-signal. The ULB starts its operation if it gets in contact with water. It has a detection range of 1800 to 3600 meter. The ULB operates in water at a depth of 6000 meter.
You can service the ULB without disassembly of the DFDR. Maintenance has to be done at set times to replace the battery of the ULB.
(14) Underwater Locator Beacon (ULB)
A ULB is attached directly to the front-panel of the DFDR.
The ULB transmits a radio-signal . The ULB starts its operation if it gets in contact with water. It has a detection range of 1800 to 3600 meter. The ULB operates in water at a depth of 6000 meter for 90 days.
You can service the ULB without disassembly of the DFDR. Maintenance has to be done at set times to replace the battery of the ULB.
(15) Underwater Locator Beacon (ULB)
For Underwater Locator Beacon refer to (Ref. AMM D/O 31-39-00-00)
E. Linear Accelerometer (LA)
F Linear Accelerometer
F LA - Functional Block Diagram
The task of the LA is to measure the acceleration of the aircraft in all three axis. The acceleration force moves a pendulum in the sensing mechanism. A proximeter senses the movement which generates a signal proportional in amplitude to the movement. A servo-amplifier amplifies the signal to excite a torque coil installed on the pendulum. The current which flows through the torque coil produces a force which is directly proportional to the acceleration force. The voltage drop across a load resistor connected in series with the torque coil is an accurate analog signal of the acceleration and gives the input signal to the SDAC. The null offset circuit lifts the null output signal to the required level. At no acceleration, the lateral and longitudinal axis output signal is 2.6 V DC and the vertical axis output signal is 1.8 V DC.
Range of measurement:
  • Vertical axis (z) = -3g to +6g
  • Longit. axis (x) = -1g to +1g
  • Lateral axis (y) = -1g to +1g
F. Wireless Ground Link - Quick Access Recorder (WGL-QAR)
F Wireless Ground Link (WGL)-Quick Access Recorder (QAR) ** ON A/C NOT FOR ALL
F WGL-QAR - Functional Block Diagram ** ON A/C NOT FOR ALL
F WGL-QAR Interface ** ON A/C NOT FOR ALL
(1) General
The WGL-QAR is used to record data from several aircraft systems on standard removable Compact Flash (CF) card for on ground performance, maintenance tasks or condition monitoring tasks. The WGL-QAR also has the possibility to send these data via a wireless ground link to a ground station.
(2) WGL-QAR Construction
(a) Major Component Characteristics
The WGL-QAR form factor is 4 MCU in accordance with ARINC 600 specification. The weight is less than 4.5 kg. The power consumption is 19 watts if the WGL-QAR during flight phase and between 19 and 23 watts when the radios are on or off.
(b) Front Panel
The front panel of the WGL-QAR has:
  • A 32 character alphanumeric display
  • A fail indicator
  • Four function switches (MODE, +, - and SEL button)
  • One CF card slot
  • A RJ-11 serial port
  • A RJ-45 ethernet port
  • A Removable Sim Module (RSM)
  • Two antenna interfaces.
(3) WGL-QAR Functions
(a) WGL-QAR Recording
The FDIMU sends HARVARD BIPHASE data to the WGL-QAR. The interface board of the WGL-QAR receives the data and extracts the clock data. The Central Processing Unit (CPU) of the WGL-QAR converts the data and stores them on the CF card.
(b) Wireless Data Transmission
The wireless transmission mode of the WGL-QAR for recorded data is active when the aircraft is on the ground. When the wireless transmission mode is on, the WGL-QAR first does a check for recorded data that must be transmitted. The WGL-QAR sends the data in the sequence that follows to the ground station:
1 All data that were previously abnormally transmitted in the middle of a data transmission.
2 All new recorded data from the last transmission time.
(c) Data Compression
Prior to the transmission, the WGL-QAR compresses the recorded data. Each recording of the flight data is stored into different compressed files.
(d) Data Encryption
After the compression of the recorded data, the data are encrypted for the wireless transmission.
(e) Data Transfer
The WGL-QAR sends the encrypted data to the ground station. The transmission starts as soon as the connection between the WGL-QAR and the ground station is done.
The WGL-DAR uses the 3G, EDGE and GPRS networks all around the world to transmit the recorded flight data. It automatically selects the cellular frequencies related to the location of the aircraft at the moment of the transmition of the recorded flight data.
(f) BITE
The WGL-QAR contains a BITE to do self-tests, qualitative diagnostics collection and test status reports. In case of discrepancies, the WGL-QAR sends a status signal to the FDIMU.
(4) Storage Media
All of the data supplied by different aircraft systems are stored on 2 standard removable Compact Flash cards:
  • 3TU1, installed in the right slot and must be FAT formatted.
The storage capacity of these cards can be 8MB to 2064MB. It is recommended that the CF card 3TU1 have the same storage capacity. It is not allowed to change the slot position of the cards after the first installation.
A disk (3TU2) contains the operational software of the WGL-QAR. It is recommended to store the disk in the disk storage box in the cockpit as a back-up of the operational software of the WGL-QAR.
(5) Controls and Indicators
(a) Manual Start/Stop Control
It is possible to start or stop the record of aircraft data on the WGL-QAR manually with the MCDU in the cockpit.
(b) Automatic Start/Stop Control
It is also possible to start or stop the record of aircraft data on the WGL-QAR automatically by special trigger conditions. The trigger conditions can be programmed on a Ground Support Equipment (GSE) and supplied to the FDIMU by its setup data base. The FDIMU then controls the record of aircraft data on the WGL-QAR.
(c) WGL-QAR Front-Panel Controls and Indicators
The WGL-QAR has different controls and indicators on the front panel to show or change its status:

  • LCD Display
    The 32-character display shows WGL-QAR low level failures, status messages and gives control/guidelines for the menu/mode functions of the WGL-QAR.
  • FAIL Indicator
    The amber indicator on the front panel comes on when a major failure occurs in the WGL-QAR. The amber indicator for example is on during the power up of the
    WGL-QAR or if no or only one CF card is installed.
  • MODE Pushbutton
    The MODE pushbutton lets the display go back to the primary display mode that the WGL-QAR is currently in or the next higher menu display.
  • + and - Pushbuttons
    The + and - pushbutton is used to move through the different modes.
    SEL Pushbutton
    The SEL pushbutton sets the MODE, which shows on the display.
** ON A/C NOT FOR ALL
7. Operation/Control and Indicating
F Power Interlock
F Power Interlock ** ON A/C NOT FOR ALL
F Power Interlock ** ON A/C NOT FOR ALL
F Power Interlock ** ON A/C NOT FOR ALL
F Power Interlock ** ON A/C NOT FOR ALL
For Power Interlock Graphic refer to (Ref. AMM D/O 31-39-00-00)
A. Energization
With the oil pressurization of one or both engines, the power interlock is released for supply of the DFDR with 115V/400 Hz. The FDIU is supplied directly from the busbar. A dimmable power bus supplies the CTL PNL indicators. For maintenance and test purposes on the ground and for preflight checks there is an override function to supply the DFDR. When the GND/CTL button on the CTL PNL is pushed an electric latch holds the override function. The blue 'ON' pushbutton light comes on. The override function supplies the equipment until the GND/CTL button is pushed again or the automatic power interlock becomes active.
With the oil pressurization of one or both engines, the power interlock is released for supply of the DFDR with 115V/400 Hz. The FDIMU is supplied directly from the busbar. A dimmable power bus supplies the CTL PNL indicators. For maintenance and test purposes on the ground and for preflight checks there is an override function to supply the DFDR. When the GND/CTL button on the CTL PNL is pushed an electric latch holds the override function. The blue 'ON' pushbutton light comes on. The override function supplies the equipment until the GND/CTL button is pushed again or the automatic power interlock becomes active.
With the oil pressurization of one or both engines, the power interlock is released for supply of the DFDR with 115V/400 Hz. The FDIMU and the QAR are supplied directly from the busbar. The power interlock switches the QAR RUN control. A dimmable power bus supplies the CTL PNL indicators. For maintenance and test purposes on the ground and for preflight checks there is an override function to supply the DFDR and to run the QAR. When the GND/CTL button on the CTL PNL is pushed an electric latch holds the override function. The blue 'ON' pushbutton light comes on. The override function supplies the equipment until the GND/CTL button is pushed again or the automatic power interlock becomes active.
For Power Interlock refer to (Ref. AMM D/O 31-39-00-00)
B. Control
F CTL PNL ** ON A/C NOT FOR ALL
For Control Panel graphic refer to (Ref. AMM D/O 31-39-00-00)
(1) Override of Power Interlock
With the electrically latched GND/CTL button it is possible to override the power interlock, so that the system can be supplied for preflight checks or for maintenance and test purposes. The GND/CTL button is installed on the CTL PNL. To prevent the erasure of stored data, you must not unnecessarily activate the override function of the power interlock.
(2) Event Mark
F Event Marker Button ** ON A/C NOT FOR ALL
An EVENT BUTTON is installed to record an EVENT MARK on the DFDR.
(3) Override of Power Interlock
For Override of Power Interlock refer to (Ref. AMM D/O 31-39-00-00)
(4) Event Mark
For Event Mark refer to (Ref. AMM D/O 31-39-00-00)
C. Indication
F CTL PNL ** ON A/C NOT FOR ALL
When you push the GND/CTL button on the control panel, an electric latch holds the override function. The blue GND/CTL button light comes on. The status line of the DFDR is connected to the FDIU. In case of a Class II fault the FDIU transmits a failure message to the CFDS. These failures are not indicated to the crew in flight but are the subject of an ECAM report on the ground after shut down of the engines. If a Class III fault occurs the related flag is set in the fault memory of the FDIU (up to 30 faults). This fault information is sent to the CFDIU. These Class III faults can be displayed on the MCDU screen via menu function (System Report/ Instruments/FDIU). These faults can wait until the next scheduled maintenance check. In case of malfunction of the CFDS, DFDR FAIL and FDIU FAIL are sent directly via SDAC to the ECAM screen.
The status signal DFDR FAULT and FDIU FAULT are suppressed in flight phases 3,4,5,7 and 8 by the FWC.
F CTL PNL ** ON A/C NOT FOR ALL
When you push the GND/CTL button on the control panel, an electric latch holds the override function. The blue GND/CTL button light comes on. The status line of the DFDR is connected to the FDIMU.

In case of a Class II fault the FDIMU transmits a failure message to the CFDS. These failures are not indicated to the crew in flight but are the subject of an ECAM report on the ground after shut down of the engines.

If a Class III fault occurs the related flag is set in the fault memory of the FDIMU (up to 30 faults). This fault information is sent to the CFDIU. These Class III faults can be displayed on the MCDU screen via menu function (System Report/Inst/FDIU).

You can postpone these faults until the next scheduled maintenance check. In case of malfunction of the CFDS, 'DFDR FAIL' and 'FDIU FAIL' are sent directly through SDAC to the ECAM screen.

The status signal DFDR FAULT and FDIU FAULT are suppressed in flight phases 3, 4, 5, 7 and 8 by the FWC.
F CTL PNL ** ON A/C NOT FOR ALL
When you push the GND/CTL button on the control panel, an electric latch holds the override function. The blue GND/CTL button light comes on. The status line of the DFDR and the QAR are connected to the FDIMU.

In case of a Class II fault the FDIMU transmits a failure message to the CFDS. These failures are not indicated to the crew in flight but are the subject of an ECAM report on the ground after shut down of the engines.

If a Class III fault occurs the related flag is set in the fault memory of the FDIMU (up to 30 faults). This fault information is sent to the CFDIU. These Class III faults are displayed on the MCDU screen, through the menu function (System Report/Inst/FDIU).

You can postpone these faults until the next scheduled maintenance check. In case of malfunction of the CFDS, 'DFDR FAIL' and 'FDIU FAIL' are sent directly through SDAC to the ECAM screen.

The status signal DFDR FAULT and FDIU FAULT are suppressed in flight phase 3, 4, 5, 7 and 8 by the FWC.
For description of the status line of the CVDRs refer to (Ref. AMM D/O 31-39-00-00)
D. Lighting
The RCDR control-panel has an integral light. You can turn the remote OVERHEAD PANEL LIGHT knob to dim the illumination.
For Recorder control-panel refer to (Ref. AMM D/O 31-39-00-00)
E. Monitoring
(1) Test
The power interlock and status monitoring can be partially tested by pushing the GND/CTL button and selecting the related CFDS menu (SYSTEM REPORT/INST/ FDIU) on the MCDU. When the GND/CTL button is pushed it activates the power interlock and the DFDR with playback will give a message on the TEST menu STATUS OF DFDR : PLAYBACK RECEIVED. If a fault occurs or a DFDR is not installed the message FAULT/NOT INSTALLTED comes into view. A second push on the GND/CTL button deactivates the power interlock and the DFDR stops. Now the message DFDR OFF/ON PLAYBACK comes into view on the TEST menu. The function of a DFDR without playback, cannot be tested. The BITE of the DFDR can be checked by activating the GND SCAN menu. To check the correct functioning of the system during operation the monitoring function in each unit (BITE) must be continuously active. For test purposes a line test connector is installed on the FDIU and DFDR front side. With a separate test, the set internal functions of the FDIU and DFDR can be checked. It is possible to print out the BITE memory of the FDIU. The DFDR playback data is also available on the FDIU test connector.
(2) Test
The power interlock and status monitoring can be partially tested by pushing the GND/CTL button and selecting the related CFDS menu (SYSTEM REPORT/INST/ FDIU) on the MCDU. When the GND/CTL button is pushed it activates the power interlock and the DFDR with playback will give a message on the TEST menu STATUS OF DFDR : PLAYBACK RECEIVED. If a fault occurs or a DFDR is not installed the message FAULT/NOT INSTALLTED comes into view. A second push on the GND/CTL button deactivates the power interlock and the DFDR stops. Now the message DFDR OFF/ON PLAYBACK comes into view on the TEST menu. The function of a DFDR without playback and the QAR cannot be tested. The status of the QAR and the BITE of the DFDR can be checked by activating the GND SCAN menu. To check the correct functioning of the system during operation the monitoring function in each unit (BITE) must be continuously active. For test purposes a line test connector is installed on the FDIU and DFDR front side. With a separate test, the set internal functions of the FDIU and DFDR can be checked. It is possible to print out the BITE memory of the FDIU. The DFDR playback data is also available on the FDIU test connector.
(3) Test
You can partially check the power interlock and status monitoring, if you push the GND/CTL button and access the related CFDS menu (SYSTEM REPORT/INST/FDIU) on the MCDU.

When you push the GND/CTL button, the power interlock starts and the DFDR will give a message on the TEST menu STATUS OF DFDR : PLAYBACK RECEIVED. RECEIVED.

If a fault occurs or a DFDR is not installed, the message 'FAULT/NOT INSTALLED' comes into view.

A second push on the GND/CTL button deactivates the power interlock and the DFDR stops. Now the message DFDR OFF/ON PLAYBACK comes into view on the TEST menu.

The function of a DFDR without playback, cannot be tested. You can check the status of the BITE of the DFDR through the GND SCAN menu.

To check the correct functioning of the system during operation, the monitoring function in each unit (BITE) must be continuously active. For test purposes a line test connector is installed on the FDIMU and DFDR front side.

With a separate test, you can check the internal functions of the FDIMU and the DFDR. It is possible to print out the BITE memory of the FDIMU. The DFDR playback data is also available on the FDIMU test connector.
(4) Test
You can partially check the power interlock and the status monitoring, if you push the GND/CTL button and access the related CFDS menu (SYSTEM REPORT/INST/ FDIU) on the MCDU.

When you push the GND/CTL button, the power interlock starts and the DFDR with playback will give a message on the TEST menu STATUS OF DFDR : PLAYBACK RECEIVED.

If a fault occurs or a DFDR is not installed the message "FAULT/NOT INSTALLTED" comes into view.

A second push on the GND/CTL button, stops the power interlock and the DFDR stops. Now the message "DFDR OFF/ON PLAYBACK" comes into view, on the TEST menu.

The function of a DFDR without playback, and the QAR, cannot be tested. You can check the status of the QAR and the BITE of the DFDR through the GND SCAN menu.

To check the correct function of the system, during operation, the monitoring function in each unit (BITE) must be continuously active. For test purposes a line test connector is installed on the FDIMU and DFDR the front side.

With a separate test, you can check the internal functions of the FDIMU and DFDR. It is possible to print out the BITE memory of the FDIMU. The DFDR playback data is also available, on the FDIMU test connector.
(5) titleTBD
(6) Monitoring
The BITE of each unit permanently monitors the FDIU and DFDR. The following monitoring are performed with microprocessor controlled or related circuitry.
For FDIU:
  • Monitoring operation of the microprocessor
  • Monitoring operation of the gate arrays
  • Monitoring operation of the memories
  • Monitoring operation of the input/output interfaces
  • Monitoring operation of the DFDR playback signal
  • Monitoring operation of power supply circuitry.
For DFDR
  • Monitoring operation of the motion of memory
  • Monitoring operation of the input data stream
  • Monitoring operation of the recording channel
  • Monitoring operation of recorded data
  • Monitoring operation of the power supply circuitry.
(7) Monitoring
Each part of the FDIMU (FDIU- and DMU-part) has its own Built In Test Equipment (BITE). The BITE does a continuously monitoring of the functions of the DFDRS and the AIDS. If the BITE detects a failure it stores the related information in the FDIMU BITE-Memory and it sends the failure-information to the CFDS via a ARINC-429 output-bus. The detected failure information can be called up via a MCDU in the cockpit. The units and functions listed below are monitored by the BITE:
For FDIU-Part:
  • Monitoring operation of the microprocessor
  • Monitoring operation of the gate arrays
  • Monitoring operation of the memories
  • Monitoring operation of the input/output interfaces
  • Monitoring operation of the DFDR playback signal
  • Monitoring operation of power supply circuitry.
For DFDR:
  • Monitoring operation of the input data stream
  • Monitoring operation of recorded data
  • Monitoring operation of the power supply circuitry.
(8) Monitoring
Each part of the FDIMU (FDIU-part and DMU-part) has a Built In Test Equipment (BITE). The BITE does a continuously monitoring of the functions of the DFDRS and the AIDS. If the BITE finds a failure, it stores the related information in the FDIMU BITE-Memory and it sends the failure-information to the CFDS through an ARINC-429 output-bus. The found failure information can be called up through an MCDU in the cockpit. The units and functions shown below are monitored by the BITE:
For FDIU-Part:
  • Monitoring operation of the microprocessor
  • Monitoring operation of the gate arrays
  • Monitoring operation of the memories
  • Monitoring operation of the input/output interfaces
  • Monitoring operation of the DFDR playback signal
  • Monitoring operation of power supply circuitry.
For DFDR:
  • Monitoring operation of the input data stream
  • Monitoring operation of recorded data
  • Monitoring operation of the power supply circuitry.
For QAR:
  • For different types of QAR,
    when a failure is found, the related failure message is shown on the ECAM screen.
(9) Monitoring
Each part of the FDIMU (FDIU- and DMU-part) has its own Built In Test Equipment (BITE). The BITE does a continuously monitoring of the functions of the DFDRS and the AIDS. If the BITE detects a failure it stores the related information in the FDIMU BITE-Memory and it sends the failure-information to the CFDS through a ARINC-429 output-bus. The detected failure information can be called up through a MCDU in the cockpit. The units and functions listed below are monitored by the BITE:
For FDIU-Part:
  • Monitoring operation of the microprocessor
  • Monitoring operation of the gate arrays
  • Monitoring operation of the memories
  • Monitoring operation of the input/output interfaces
  • Monitoring operation of power supply circuitry.
For CVDRs:
  • Monitoring operation of the input data stream
  • Monitoring operation of recorded data
  • Monitoring operation of the power supply circuitry.
** ON A/C NOT FOR ALL
8. Test BITE
A. Conditions of Power-Up Test Initialization
(1) How long the computer must be de-energized:
  • 1 second
(2) A/C configuration:
  • A/C on ground and engines stopped
(3) For de-energize the computer refer to (Ref. AMM D/O 31-39-00-00)
(4) For A/C configuration refer to (Ref. AMM D/O 31-39-00-00)
B. Progress of Power-up Test
(1) Duration:
  • 25 seconds max.
(2) Cockpit repercussions directly connected with power-up test
accomplishment (some other repercussions may occur depending on the
A/C configuration but these can be ignored):
  • ECAM warnings:
    "RECORDER FDIU FAULT" is shown for 3 seconds.
(3) Duration
For Duration refer to (Ref. AMM D/O 31-39-00-00)
(4) Cockpit repercussions
For Cockpit repercussions refer to (Ref. AMM D/O 31-39-00-00)
C. Results of Power-up Test
(1) Test passed:
  • None
(2) Test failed:
  • ECAM warning:
    "RECORDER FDIU FAULT"
(3) Test passed
For Test passed refer to (Ref. AMM D/O 31-39-00-00)
(4) Test failed
For Test failed refer to (Ref. AMM D/O 31-39-00-00)
D. DFDRS Failure Messages

-----------------------------------------------------------------------------
! ATA - NO ! Name of Failure ! EXT/INT ! Class !
!------------!-------------------------------------------!-----------!--------!
! 31-33-55 ! DFDR ! INT ! II !
! ! ! ! !
! 31-33-34 ! FDIU ! INT ! II !
! ! ! ! !
! 31-33-52 ! QAR (if installed) ! INT ! II !
! ! ! ! !
! 31-33-52 ! QAR TAPE LOW (if installed) ! INT ! II !
! ! ! ! !
! 31-33-16 ! ACCELEROMETER ! INT ! II !
! ! ! ! !
! 31-33-55 ! DFDR PLAYBACK ! INT ! III !
! ! ! ! !
! 31-33-34 ! NO AC IDENT CODE ! INT ! III !
! ! ! ! !
! 31-21-34 ! NO CLOCK DATA ! EXT ! III !
! ! ! ! !
! 31-32-34 ! NO CFDS DATA ! EXT ! III !
! ! ! ! !
! 31-55-34 ! NO SDAC 1 DATA ! EXT ! III !
! ! ! ! !
! 31-55-34 ! NO SDAC 2 DATA ! EXT ! III !
! ! ! ! !
! 31-53-34 ! NO FWC 1 DATA ! EXT ! III !
! ! ! ! !
! 31-53-34 ! NO FWC 2 DATA ! EXT ! III !
! ! ! ! !
! 31-62-34 ! NO DMC 1 DATA ! EXT ! III !
! ! ! ! !
! 31-62-34 ! NO DMC 2 DATA ! EXT ! III !
! ! ! ! !
! 32-42-34 ! NO BSCU 1 DATA ! EXT ! III !
! ! ! ! !
! 32-42-34 ! NO BSCU 2 DATA ! EXT ! III !
! ! ! ! !
! 27-95-34 ! NO FCDC 1 DATA ! EXT ! III !
! ! ! ! !
! 27-95-34 ! NO FCDC 2 DATA ! EXT ! III !
-----------------------------------------------------------------------------


-----------------------------------------------------------------------------
! ATA - NO ! Name of Failure ! EXT/INT ! Class !
!------------!-------------------------------------------!-----------!--------!
! 31-33-55 ! DFDR (1TU) ! INT ! II !
! ! ! ! !
! 31-36-34 ! FDIMU (10TV) ! INT ! II !
! ! ! ! !
! 31-33-52 ! QAR (3TU) (if installed) ! INT ! II !
! ! ! ! !
! 31-33-52 ! QAR TABLE LOW (if installed) ! INT ! II !
! ! ! ! !
! 31-33-16 ! ACCELEROMETER (6TU) ! INT ! II !
! ! ! ! !
! 31-33-55 ! DFDR PLAYBACK (1TU) ! INT ! III !
! ! ! ! !
! 31-33-34 ! NO AC IDENT CODE (14TU) ! INT ! III !
! ! ! ! !
! 31-21-34 ! CLOCK(1FS)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 45-13-34 ! CFDIU(1TM)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-55-34 ! SDAC(1WV1)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-55-34 ! SDAC2(1WV2)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-53-34 ! FWC1(1WW1)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-53-34 ! FWC2(1WW2)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-62-34 ! DMC1(1WT)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-62-34 ! DMC2(1WT)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-42-34 ! BSCU1(3GG)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-42-34 ! BSCU2(3GG)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 27-95-34 ! FCDC1(1CE1)/FDIMU ! EXT ! III !
! ! ! ! !
! 27-95-34 ! FCDC2(1CE1)/FDIMU ! EXT ! III !
-----------------------------------------------------------------------------


+-----------------------------------------------------------------------------+
! ATA - No ! Name of Failure ! EXT/INT ! Class !
!------------!-------------------------------------------!-----------!--------!
! 31-33-55 ! DFDR (1TU) ! INT ! II !
! ! ! ! !
! 31-36-34 ! FDIMU (10TV) ! INT ! II !
! ! ! ! !
! 31-33-52 ! QAR (3TU) ! INT ! II !
! ! ! ! !
! 31-33-52 ! QAR MEDIA LOW (3TU) ! INT ! II !
! ! ! ! !
! 31-33-16 ! ACCELEROMETER (6TU) ! INT ! II !
! ! ! ! !
! 31-33-55 ! DFDR PLAYBACK (1TU) ! INT ! III !
! ! ! ! !
! 31-33-34 ! NO AC IDENT CODE (197VC) ! INT ! III !
! ! ! ! !
! 31-21-34 ! CLOCK(2FS)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-32-34 ! CFDIU(1TW)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-55-34 ! SDAC1(1WV1)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-55-34 ! SDAC2(1WV2)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-53-34 ! FWC1(1WW1)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-53-34 ! FWC2(1WW2)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-63-34 ! DMC1(1WT1)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 31-63-34 ! DMC2(1WT2)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 32-42-34 ! BSCU1(10GG)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 32-42-34 ! BSCU2(10GG)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 27-95-34 ! FCDC1(3CE1)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 27-95-34 ! FCDC2(3CE2)/FDIMU(10TV) ! EXT ! III !
! ! ! ! !
! 34-22-55 ! ISISI(22FN)/FDIMU(10TV) * ! EXT ! III !
! ! ! ! !
! 34-22-55 ! ISISA(22FN)/FDIMU(10TV) * ! EXT ! III !
+-----------------------------------------------------------------------------+

(*) The failure message is shown if the CFDIU Label 157 SDI 00 is valid and the bit 16 is set to "1".
For CVDRs Failure Messages refer to (Ref. AMM D/O 31-39-00-00)
[Rev.10 from 2021] 2026.04.01 06:35:53 UTC
"Aviabrain" 2025