W DOC AIRBUS | AMM A320F

SPOILER AND ELEVATOR COMPUTER (SEC) - DESCRIPTION AND OPERATION

** ON A/C NOT FOR ALL
1. General
The Spoiler Elevator Computer (SEC) is a sub-system of the Electrical Flight Control System which controls the spoilers and, in standby mode, the pitch control surfaces.
The role of the SEC is to convert pilot inputs into control surface movements, based on aircraft motion information from roll and pitch transducers, accelerometers, speedbrake control lever, etc.
F SEC Architecture
Each aircraft has three SECs
The functions achieved are :
  • Roll
  • Ground Spoiler
  • Speedbrake
  • Elevator and THS controls
    Each computer has two units:
    - the COM unit which mainly calculates the deflection orders as a function of the received signal and slaves the control surfaces.
    - the MON unit which mainly checks that the orders are correctly executed.
** ON A/C NOT FOR ALL
2. Component Location
F SECs Location
FIN FUNCTIONAL
DESIGNATION		 PANEL ZONE ACCESS
DOOR		 ATA REF
** ON A/C NOT FOR ALL
1CE3 SEC-3 93VU 121 27-94-34
** ON A/C ALL
1CE1 SEC-1 83VU 127 27-94-34
1CE2 SEC-2 84VU 128 27-94-34
** ON A/C NOT FOR ALL
1CE3 SEC-3 93VU 121 27-94-34
** ON A/C NOT FOR ALL
3. Power Supply
F SEC Electrical Power Supply
The SEC1 is supplied from the DC essential busbar 4PP, the battery 1 taking over instantaneously through a dedicated diode device (Power Supply Decoupling Unit) when the voltage level drops below the battery output voltage.
F SEC 1 Power Supply
A relay ensures the battery supply line breaking on the ground 30s after the second engine is shut down.
The SEC2 and SEC3 are supplied from the DC normal busbar 2PP
F SEC 2 and SEC 3 Power Supply
** ON A/C NOT FOR ALL
4. Interface
Each SEC receives and sends analog, digital and discrete data
F SEC Links (General)
A. Analog Interface
(1) Interface with the Side Stick Transducer Units.
F Side Stick Transducer Unit
Each side stick (CAPT and F/O) has two transducer units ; one for the roll, the other one for the pitch.
The transducer units transmit side stick information to the SEC command and monitoring units (ANI 1).
The associated SEC unit ensures the power supply of each potentiometer track. There are also discrete signals for side stick priority.
(2) Interface with the Throttle Control Unit.
F Throttle Control Units
For ground spoiler logic, each SEC receives throttle position data from two potentiometers of one Throttle Control Unit.
(3) Interface with the Speedbrake Control Transducer Unit.
F Speedbrake Control Transducer Unit
The Speedbrake Control Transducer Unit has two sets of three-tracks potentiometers. The COM unit of each SEC is connected to one potentiometer of one set, the MON unit is connected to one potentiometer of the other set.
(4) Interface with RVDT or LVDT
6 wire transducers (ANI 2) : for surface position transducer.
4 wire transducers:
(ANI 3) : for servovalve position transducer,
(ANI 7) : for servo-actuator mode transducer.
(5) Interface with the wheel tachometer.
F Tachometers
Each main landing gear wheel is fitted with a tachometer that transmits wheel speed information to the SEC COM and MON units (ANI 6).
(6) Interface with the accelerometers.
F Accelerometers
Each accelerometer is connected to the COM and MON units of one SEC (ANI 4).
Each SEC is connected to two accelerometers.
B. Discrete Interface
(1) Interface with pressure switches.
F Pressure Switches
Each SEC COM and MON unit is directly connected to one switch per system.
(2) Interface with the SFCC.
F SFCC/ELAC-SEC (Discrete)
One discrete signal is transmitted from each SFCC slat channel to the SEC:
  • slat position equal to or greater than 17 deg.: ground
  • slat position less than 17 deg.: open circuit
(3) Ground Spoilers extended.
F SEC Discrete Output: GND SPLR ON
Each SEC unit sends to the BSCU and ELAC the discrete signal (DS07) : Ground spoilers extended.
(4) Interface with the ELACs.
F ELAC Discrete Output: DGO 1 Validation
F ELAC DIGITAL OUTPUT 1 (ARINC 429)
The DGI 9 and DGI 11 (Ref. ARINC interface) digital data are validated by the discrete data DSI 14 and DSI 21 on each unit.
The SEC sends and receives discrete information for pitch priority
F ELAC 2/ELAC 1-SEC : Pitch Axis Failure (Discrete)
F ELAC 1/SEC : Pitch Axis Failure (Discrete)
(5) Interface with the other SECs
F SEC 2/SEC 1 : Pitch Axis Failure (Discrete)
F SEC 1/SEC 2 : Pitch Axis Failure (Discrete)
C. ARINC Interface
(1) Interface with the LGCIU.
F LGCIU/SEC (ARINC 429)
Each SEC command and monitor unit receives (DGI 14) an ARINC 429 data-bus discrete word using the landing gear up/down information.
(2) Interface with the SFCC.
F SFCC/ELAC-SEC (ARINC 429)
The SEC COM and MON units use the digital information from the SFCC for configuration determination
(3) Interface with the ADIRS.
F IR/ELAC-SEC (ARINC 429)
F ADR/ELAC-SEC (ARINC 429)
The connections of the ADIRS to the SEC consist of two ARINC 429 data buses transmitted from each ADC and two buses transmitted from each IRS.
(4) Interface with the FCDC.
F FCDC/ELAC-SEC (ARINC 429)
Each SEC COM and MON unit sends to the FCDCs an ARINC 429 data bus DG01.
The main information is :
  • side stick position
  • surface position
  • law statics
  • aircraft status
  • maintenance information.
Each SEC receives from the FCDCs an ARINC 429 data bus (DGI10).
(5) Interface with the ELACs.
F ELAC DIGITAL OUTPUT 1 (ARINC 429)
Each SEC receives from the two ELACs two ARINC 429 data buses (DGI9 and DGI11).
** ON A/C NOT FOR ALL
5. Component Description
A. General FIN: 1-CE-1 FIN: 1-CE-2 FIN: 1-CE-3
The Spoiler Elevator Computer (SEC) is housed in a 8MCU casing in accordance with the ARINC Standard 600.
General arrangement :
  • layout
F SEC Layout
The SEC has two channels : the command channel and the monitor channel.
There is no electrical link between the two channels inside the computer.
The COM channel has three boards.
The MON channel has two boards.
(1) CPU boards A55 and A70.
Plug-in boards, each equipped with four connectors :
  • one 62-pin connector (P2)
  • one 98-pin connector (P1)
  • one 39-pin connector (J1) reserved for tests
  • one 53-pin connector (J2) linked with memory boards A15 and A30.
(2) CONTROL LOOP boards A53 and A73.
Plug-in boards, each equipped with three connectors :
  • one 62-pin connector (P2) reserved for the buses and power supply
  • one 98-pin connector (P1) for the other signals.
  • one 39-pin connector (J1) reserved for tests.
(3) SERVO DRIVE board (COM channel only) A50.
  • Same as control loop boards.
(4) Memory boards A15 and A30.
Memory boards attached to the face by screws. They are plugged into boards A55,A70 by means of connector J2.
The boards are guided by brackets on boards A55,A70.
(5) Power supply units A90 and A91, each equipped with a 40-pin connector.
Each block can move between two slides which evacuate heat by conduction when the block is pressed down.
B. Description of the Boards
(1) CPU board.
The CPU boar forms the central processing unit of the calculation section of the computer. The CPU 186 board comprises the microprocessor and associated circuits.
It has the components below :
  • a 80186 microprocessor
  • a clock circuit
  • management circuits
  • a RAM used to save data for restart of the microprocessor after a short power supply cut.
  • an EPROM which constitutes the BITE memory
  • an I/O ARINC interface
  • a common RAM to store the ARINC words
  • the power supplies required for the operation of the board : plus or minus 15,5V.
(2) ARINC board
Not applicable.
(3) CONTROL LOOP board
The CONTROL LOOP board includes the 80C86 microprocessor and associated circuits.
It forms the central processing unit of the slaving section of the computer.
It performs the acquisition and processing of the inductive transducers and manages the transmission on an ARINC line.
This board has the elements below :
  • a 80C86 microprocessor and associated circuits
  • a RAM used to save data during a short power cut
  • I/O circuits : PI0 8255
  • a RAM common to the two microprocessors 80C86 and 80186
  • the circuits for the acquisition and transmission of ARINC words
  • the circuits required for the acquisition of inductive transducers: a digital/analog converter (DAC), a multiplier unit and an integrator
  • amplifiers for transducer power supply.
(4) SERVO DRIVE board
The SERVO DRIVE board performs the functions below :
  • generate the orders and analog command
  • re-read these orders to verify the correct operation of the digital/ analog converter
  • control a certain number of relays (transmission of orders to the servovalves, transmission of power supply to the inductive transducers)
  • provide the interface for 16 discrete inputs and 8 discrete outputs.
** ON A/C NOT FOR ALL
6. Operation
A. General
The Spoiler Elevator Computer (SEC) is organized around two channels :
F SEC - Internal General Architecture
  • The command channel
  • The monitor channel.
The command channel receives analog sensor data, ARINC data and discrete signals in order to generate the flight commands used to drive the corresponding servo control.
The connections between the computer and the servo control are of the analog type.
The monitor channel independently receives the transducer data required to compute the control laws. Its role is to monitor the computations of the command channel and in particular the servo loop.
The data exchange between the two channels, in order to perform the consolidation and synchronization operations, takes place on a high-speed ARINC bus.
Each channel includes a digital part and an analog part.
The digital part is built around two processors :
  • a main processing unit for input/output system management and control law computation based on a 16-bit microprocessor (INTEL 80186).
  • a digital control unit for high-speed servo loop computation, real-time alternative input acquisitions and servo control monitoring based on a 16-bit microprocessor (INTEL 80C86).
The analog part converts the commands computed by the software into control currents.
They are transmitted to the control surfaces as follows :
  • to the spoilers through COM relays for which the power supply and activation commands are generated by the MON channel
    F Spoiler Servovalve control
  • to the THS and elevators through MON relays in series with the COM relays.
In addition, the currents are read and monitored by the software in the COM channel only.
B. Functions
Each channel performs five main functions :
  • input management
  • control law computation and synchronization
  • servo loop processing
  • engage logic
  • output management
In addition, each channel has its own power supply.
(1) Input management
This part ensures acquisition of the input parameters.
These take various forms :
(a) analog DC signals from position transducers on the side stick, speedbrake control unit and throttle (ANI 1).
Analog DC signal acquisition is shown
F Potentiometer Signal Acquisition
An adaptation circuit receives the DC signals from position transducers. It amplifies and sends them to a multiplexer circuit.
The multiplexer selects one input out of 32 and sends it to an A/D converter which transmits the information to the CPU board.
A VREF circuit sends cold points of the potentiometers to the CPU 186 board which can detect, by software, an anomaly in the potentiometer supplies.
The potentiometer power-supply circuit receives 28VDC and generates a 15VDC to supply the potentiometers.
The acquisition principle of the analog DC accelerometer signals (ANI 4) is the same as for the potentiometers.
(b) Analog AC signals from the various control surface position transducers of the inductive pick-off type (ANI 2, ANI 3, ANI 7).
The ENGAGE LOGIC board receives these signals from inductive transducers and generated VR=V1-V2 and VX=V1+V2 signals
F ANI 2 Input
NOTE: For ANI 3 and ANI 7, VR is the potentiometer supply.
The CONTROL LOOP board receives each VR and VX representative of a transducer position.
The various input channels are processed sequentially.
The sequence is controlled by the Central Processing Unit.
The conversion program cycle is shown below :
  • selection of the analog input and loading of the DAC multiplier with QD (QD is the digital conversion of the analog input).
  • computation of the analog error epsilon = VX - QD VR
  • integration of the error epsilon during a period
  • discharge of integrator output until zero crossing detection
  • measurement of the discharge time.
This time is representative of epsilon and is sent to the servo loop processing which computes a new Qd for a new conversion cycle.
NOTE: A phase reference detection is achieved to select epsilon or epsilon at the integrator input.
  • Tachometer generator acquisition
    The analog AC input from the tachometer generator is processed in accordance with
    F Tachometer Generator Acquisition
    The input signal has variable frequency (up to 4500 Hz) and voltage (30V peak to peak).
    After adaptation, a square wave signal with the same frequency is obtained.
    The controller manages a 16-bit counter which determines the number of clock periods within one period of the input signal. It also transfers the counter output to the buffer. This number of clock periods represents the wheel speed.
    The clock frequency (375KHz) is obtained by dividing the clock integrated on the microprocessor 80186.
    -Analog Inputs
    _______________________________________________________________________________
    ! TYPE ! ANI ! ORIGIN ! NUMBER !
    ! ! NAME ! ! COM ! MON !
    !____________________!___________!____________________________________________!
    !Center-point ! 1-1 !CAPT ELEV Command ! 7 ! 7 !
    !potentiometer ! 1-2 !F/O ELEV Command ! ! !
    ! ! 1-3 !CAPT AIL Command ! ! !
    ! ! 1-4 !F/O AIL Command ! ! !
    ! ! 1-5 !SPD BRK CTL Lever Pos ! ! !
    ! ! 1-6 !L throttle CTL Lever Pos ! ! !
    ! ! 1-7 !R throttle CTL Lever Pos ! ! !
    !--------------------!-----------!------------------------------!------!------!
    !Inductive ! 2-1 !L ELEV POS (RVDT) ! 7 ! 7 !
    !transducers ! 2-2 !R ELEV POS (RVDT) ! ! !
    !(SM) with 2 offset ! 2-3 !THS POS (RVDT) ! ! !
    !secondaries ! 2-4 !L SPLR X POS (LVDT) ! ! !
    !(RVDT-LVDT) ! 2-5 !R SPLR X POS (LVDT) ! ! !
    ! ! 2-6 !L SPLR Y POS (LVDT) ! ! !
    ! ! 2-7 !R SPLR Y POS (LVDT) ! ! !
    !____________________!___________!______________________________!______!______!
    !Inductive ! 3-1 !L ELEV SV slide valve (LVDT) ! ! 2 !
    !transducers ! 3-2 !R ELEV SV slide valve (RVDT) ! ! !
    !(SV) with one ! ! ! ! !
    !secondary (LVDT) ! ! ! ! !
    !____________________!___________!______________________________!______!______!
    !Low-impedance ! 4-1 !Vertical acceleration X ! 3 ! 3 !
    !DC signals ! 4-2 !Vertical acceleration Y ! (+2) ! (+2) !
    !(accelerometer) ! 4-3 !Test ! ! !
    ! ! 4-4 !Provision ! ! !
    ! ! 4-5 !Provision ! ! !
    !____________________!___________!______________________________!______!______!
    !Analog output ! 5-1 !L ELEV SV current ! 7 ! !
    !internal ! 5-2 !R ELEV SV current ! ! !
    !wraparound ! 5-3 !THS SV current ! ! !
    !(current) ! 5-4 !L SPLR X SV current ! ! !
    ! ! 5-5 !R SPLR X SV current ! ! !
    ! ! 5-6 !L SPLR Y SV current ! ! !
    ! ! 5-7 !R SPLR Y SV current ! ! !
    !____________________!___________!______________________________!______!______!
    !Tachometer ! 6-1 !Main wheel speed ! 1 ! 1 !
    !generator ! ! ! ! !
    !____________________!___________!______________________________!______!______!
    !Inductive ! 7-1 !L ELEV mode change slide valve! ! 2 !
    !Transducer ! !POS ! ! !
    !(LVDT with one ! 7-2 !R ELEV mode change slide valve! ! !
    !secondary) ! !POS ! ! !
    !____________________!___________!______________________________!______!______!

    -Digital Inputs
    _______________________________________________________________________________
    ! TYPE ! NAME ! SOURCE !
    !__________!___________!______________________________________________________!
    ! HS ! DGI 1 ! Associated Unit !
    ! ! DGI 2 ! IRS !
    ! ! DGI 3 ! IRS !
    ! ! DGI 4 ! Provision !
    !__________!___________!______________________________________________________!
    ! LS ! DGI 5 ! Provision !
    ! ! DGI 6 ! ADC !
    ! ! DGI 7 ! ADC !
    ! ! DGI 8 ! Provision !
    ! ! DGI 9 ! ELAC 1 !
    ! ! DGI 10 ! FCDC !
    ! ! DGI 11 ! ELAC 2 !
    ! ! DGI 12 ! SFCC !
    ! ! DGI 13 ! Associated Unit !
    ! ! DGI 14 ! LGCIU !
    ! ! DGI 15 ! Provision !
    ! ! DGI 16 ! FTI (signal generator) !
    ! ! DGI 17 ! Provision !
    !__________!___________!______________________________________________________!

    - ARINC signals from the various systems (IRS, ADC, SFCC) and from the opposite channel (DGI 1). The ARINC signals acquisition is processed in accordance with
    F ARINC Acquisition
    The ARINC board receives 16 ARINC buses and achieves the operations necessary to write the ARINC word into a common RAM.
    The Central Processing Unit reads the ARINC word in the common RAM.
    The ARINC receiver circuits monitor the no-refresh of the ARINC buses.
  • The discrete inputs indicate the status of the aircraft.
    There are two types of discrete inputs
    state 1 = open state 0 = ground.
    state 1 = 28 volts state 0 = open or ground.
    The discrete inputs are processed by the main processor in compliance with
    F Discrete Inputs
    The adaptation circuit converts the 28V/OPEN or GND/OPEN input levels into 0-5V levels.
    The multiplexer circuit selects one input out of 32 and sends it via the data bus (D15).
    In the COM channel, the servo loop processor acquires 16 additional ground/open discretes.
  • The control current monitorings (ANI 5) are processed in accordance with
    F Control Current Monitoring
    The amplifier sends the control current signal to the multiplexer.
    The multiplexer selects one signal out of seven according to the selected input.
    After an adaptation, the ADC circuit converts this signal and sends it on the data bus of the servo loop board.
(2) Control law computation
The deflection commands are processed in accordance with
F Control Law Computation
The control laws are programmed in the memory module and the data inputs are used by the central unit to compute the surface deflection orders.
These deflection orders are sent to the servo loop processor.
The different control laws are explained in 27-90.
(3) Servo loop processing
This function consists in computing the error between the deflection order and the surface position in order to generate a control current for the servo valves or the THS motors.
The servo loop is processed in accordance with
F Control Surface Servo Loop
The control current is generated as follows :
  • the servo loop board receives the surface deflection order epsilon from the CPU 186 board and computes the digital encoding value Qd of the surface position.
  • by software, computation of digital current value Id
  • transfer of digital value Id to the SERVO DRIVE board
  • latching Id to have a constant value during the D/A convertion.
  • Digital/Analog convertion of Id into Ia
  • Ia amplification and generation of control current.
(a) spoiler slaving
F Spoiler Y - Slaving and Monitoring
F Spoiler X - Slaving and Monitoring
In the COM unit, there are two main functions :
1 Generation of the servo valve current from the order and position feedback.
As soon as an order is received, a compensation adds 2mA to the calculated current to counteract the servo valve bias. When there is no order, a -1.5mA current is added to the servo valve bias effect in order to cause the spoilers to be more pressed against the wing.
Case of spoilers performing LAF.
If the LAF is activated and if the difference between the order and the position feedback exceeds 2.5 degrees, the servo valve current is equal to 12mA.
2 Monitoring of the servo valve current through comparison between the calculated current and the measured current.
This monitoring is inhibited if the slaving is not active.
In the MON unit, there are two monitorings :
  • monitoring of the orders generated in the two units.
  • monitoring of the servo valve through :
    monitoring of the spoiler position,
    monitoring of the spoiler response to an order.
These monitorings are inhibited if the slaving is not active.
The MON unit cuts the servo valve current when the slaving is not active.
(b) Elevator slaving
F Elevator Servocontrol Slaving in the SEC
In the COM unit, there are two main functions :
  • generation of the control current,
  • monitoring of this current through internal wraparound.
  • monitoring of the servo valve transducer (comparison between the servo valve current commanded by COM and the transducer position received by MON)
For the current generation, there is a compensation of the mechanical device which ensures the centering of the control surface.
In the MON unit, the slaving monitoring function monitors the correct operation of the servo valve. This is to prevent runaways.
The surface position is taken on the transducer unit elevator position.
(c) THS slaving
F Slaving of THS by the SECs
In the COM unit, there are 3 functions :
  • calculation of the deflection order depending on the Auto Trim function
  • generation of the THS motor control current
  • current monitoring through wraparound.
When the computer is not in charge of the THS slaving, the slaving order is synchronized on the actual position of the THS.
In the MON unit, the monitoring of the THS position is made through the comparison of the actual position with the theoretical position.
The theoretical position is computed through the use of "images" of the electric and hydraulic motors.
The monitoring functions are active only if the slaving is engaged.
(4) ENGAGE LOGIC
The ENGAGE LOGIC is processed in accordance with
F ENGAGE Logic
(a) Purpose of the ENGAGE logic
  • determination of the state of the computer : generation of SEC HEALTHY discrete. Each unit (or microprocessor) can open the output relays independently of the other
  • control of all SEC relays : through relay K30 the power supply of all the other SEC relays can be cut off.
  • illumination of the FAULT/ON/OFF pushbutton switch.
(b) Realization of the ENGAGE logic signals below to generate the SEC
HEALTHY discrete signal and to control the relay K30.
  • no failure of the two microprocessors : not MPFAIL and not SPFAIL
    These signals are confirmed and latched
  • no failure of : watchdog not WD
  • no overvoltage ELRES
  • pushbutton switch selected ON.
    SEC HEALTHY will become bad if one of the two units detects a failure.
    A reset of the microprocessors is performed when a failure is detected, and the ON/OFF button changesto the OFF state.
(5) Output management
This function ensures the generation of the output parameters.
  • the ARINC outputs (DG01) to the FCDC and to the SEC (DG03) are processed in accordance with
    F ARINC Output
    The FIFO receives the CPU data bus and retransmits it to the parallel-to-serial conversion circuit.
    The ARINC words are sent to the ARINC modulator for the ARINC 429 standard adaptation.
    The CPU 186 board generates DGO1 to the FCDC and the ARINC board generates DG03 to the SEC
  • the analog outputs (DSO) are processed in accordance with
    F Spoiler Servovalve control
    F Elevator Servovalve Control
    F THS Control (Motor 2)
    F THS Control (Motor 3)
    -Analog Outputs
    _______________________________________________________________________________
    ! NAME ! USE ! CHARACTERISTICS !
    ! ! ! I (mA) ! R !
    !_______!________________!_________________________ !_________________________!
    ! ANO 1 !L ELEV SV CTL ! I lower than or = to +10 !500 ohms + or - 35% !
    ! ANO 2 !R ELEV SV CTL ! and !500 ohms + or - 35% !
    ! ANO 3 !THS CTL ! I lower than or = to -10 !500 ohms + or - 1% !
    !_____________________________________________________________________________!
    ! ANO 4 !R SPLR X SV CTL ! I lower than or = to -4 !500 ohms + or - 35% !
    ! ANO 5 !L SPLR X SV CTL ! and !500 ohms + or - 35% !
    ! ANO 6 !R SPLR Y SV CTL ! I lower than or = to + 12!500 ohms + or - 35% !
    ! ANO 7 !L SPLR Y SV CTL ! !500 ohms + or - 35% !
    !_______!________________!__________________________!_________________________!

    The SERVO DRIVE board drives four spoiler servocontrols.
    The output relays are controlled by the MON channel.
    The elevator servo valve currents are generated by the COM SERVO DRIVE board and monitored by the COM and MON ENGAGE logic board.
    The control of the THS motors 2 and 3 is shown in
    F THS Control (Motor 2)
    F THS Control (Motor 3)
    The discrete outputs (DSO) indicate the status of certain functions
    F SEC Discrete Outputs
    The LATCH circuit memorizes the data bus D15 at the address determined by A1 to A4 of address bus.
    The LATCH outputs are adapted to standard discrete outputs by an adaptation circuit.
    Discrete outputs : SEC1
    -------------------------------------------------------------------------------
    NAME ELECTRICAL LEVEL TO SIGNAL STATUS
    -------------------------------------------------------------------------------
    THR RVS SELECTED COM GND/OC EIU1 GND=SELECTED
    THR RVS SELECTED MON GND/OC EIU2 GND=SELECTED
    L ELEV MONG OK COM GND/OC SEC1 MON GND=OK
    SEC2 COM
    SEC2 MON
    L ELEV MONG OK MON GND/OC SEC1 COM GND=OK
    SEC2 COM
    SEC2 MON
    R ELEV MONG OK COM GND/OC SEC1 MON GND=OK
    SEC2 COM
    SEC2 MON
    R ELEV MONG OK MON GND/OC SEC1 COM GND=OK
    SEC2 COM
    SEC2 MON
    GND SPLR OUT COM GND/OC ELAC1 COM GND=OUT
    BSCU
    GND SPLR OUT MON GND/OC ELAC2 MON GND=OUT
    BSCU
    RLY SEC FAULT COM +28VDC/OC RLY SEC1 +28VDC=FAULT
    RLY SEC FAULT MON GND/OC RLY SEC1 GND=FAULT


    Discrete outputs : SEC2
    -------------------------------------------------------------------------------
    NAME ELECTRICAL LEVEL TO SIGNAL STATUS
    -------------------------------------------------------------------------------
    THR RVS SELECTED COM GND/OC EIU1 GND=SELECTED
    L ELEV MONG OK COM GND/OC SEC2 MON GND=OK
    SEC1 COM
    SEC1 MON
    L ELEV MONG OK MON GND/OC SEC2 COM GND=OK
    SEC1 COM
    SEC1 MON
    R ELEV MONG OK COM GND/OC SEC2 MON GND=OK
    SEC1 COM
    SEC1 MON
    R ELEV MONG OK MON GND/OC SEC2 COM GND=OK
    SEC1 COM
    SEC1 MON
    GND SPLR OUT COM GND/OC BSCU GND=OUT
    GND SPLR OUT MON GND/OC ELAC1 MON GND=OUT
    BSCU
    RLY SEC FAULT COM +28VDC/OC RLY SEC2 +28VDC=FAULT
    RLY SEC FAULT MON GND/OC RLY SEC2 GND=FAULT


    Discrete outputs : SEC3
    -------------------------------------------------------------------------------
    NAME ELECTRICAL LEVEL TO SIGNAL STATUS
    -------------------------------------------------------------------------------
    THR RVS SELECTED MON GND/OC EIU2 GND=SELECTED
    GND SPLR OUT COM GND/OC ELAC2 COM GND=OUT
    BSCU
    GND SPLR OUT MON GND/OC BSCU GND=OUT
    RLY SEC FAULT COM +28VDC/OC RLY SEC3 +28VDC=FAULT
    RLY SEC FAULT MON GND/OC RLY SEC3 GND=FAULT

[Rev.10 from 2021] 2026.04.01 08:39:18 UTC
"Aviabrain" 2025